Week In Review: Design, Low Power

Domain-specific logic simulation; new Arm CPUs, GPUs; high-frequency RF/MW simulation; memory, AMS design; Accenture buys XtremeEDA.


IP, design

Arm unveiled a number of new CPUs and GPUs. Based on the Armv9 architecture, the Cortex-X3 aims to improve single-threaded performance and targets a range of benchmarks and applications. The Cortex-A715 focuses on efficient performance, delivering a 20% energy efficiency gain and 5% performance uplift compared to Cortex-A710. In addition, the Cortex-A510 and DSU-110 were updated to reduce power and improve scalability up to 12 cores. On the GPU front, it debuted Immortalis-G715, the first Arm GPU to offer hardware-based ray tracing support on mobile, as well as Mali-G715 and Mali-G615 GPUs, which include variable rate shading to improve energy savings and gaming performance in premium devices.

Cadence announced RTL-to-GDS digital flow Rapid Adoption Kits (RAKs) for Arm Cortex-A715 and Cortex-X3 CPUs and the Arm Mali-G715 and Immortalis-G715 GPUs on 5nm and 7nm nodes to help achieve optimized PPA goals and improved productivity. In addition, Cadence has validated mobile reference platforms for the Cortex-A715 and Cortex-X3 CPUs and the Mali-G715 and Immortalis-G715 GPUs.

Synopsys optimized its design, verification, and IP solutions to deliver maximum performance-per-watt for the latest Armv9 architecture-based SoCs, including the Cortex-A715, Cortex-A510, and Cortex-X3 CPUs and Immortalis-G715, Mali-G715, and Mali-G615 gaming-optimized GPUs. Synopsys QuickStart Implementation Kits (QIKs) are available that include implementation scripts and reference guides.

Cadence expanded its family of radar, lidar, and communications DSPs with two new DSP IP cores for embedded processing in the automotive, consumer, and industrial markets. The 128-bit ConnX 110 DSP and 256-bit ConnX 120 DSP feature an N-way programming model and are fully compatible with the ConnX B10 and B20 DSPs, and use an optimized instruction set for radar, lidar, and communications applications.

Flex Logix and CEVA announced a Flex Logix EFLX embedded FPGA (eFPGA) connected to a CEVA-X2 DSP instruction extension interface to enable flexible and changeable instruction sets to meet changing processing workloads. The ASIC was designed and taped out in a TSMC 16 nm technology by Bar-Ilan University SoC Lab, as part of the HiPer Consortium, backed by the Israeli Innovation Authority.

Truechip added USB 4 HUB & Retimer models to its lineup of verification IP.

Professional services firm Accenture will acquire XtremeEDA, a provider of silicon design and verification services. “By combining XtremeEDA’s strong and deep experience in advance silicon design with Accenture’s Cloud First capabilities, we are poised to deliver more value for clients in specialized hardware, distributed cloud, decentralized edge computing and complex security needs,” said Jeffrey Russell, president of Accenture in Canada. XtremeEDA was founded in 2002 and is based in Ottawa, Canada. Terms of the deal were not disclosed.


Cadence unveiled Xcelium Apps, a portfolio of domain-specific technologies implemented natively on the Xcelium Logic Simulator kernel to improve verification performance for automotive, mobile and hyperscale designs. The portfolio includes a Machine Learning App to reduce regression times by learning from previous regression runs and guiding the Xcelium randomization kernel; a Digital Mixed-Signal App for co-simulation with Spectre SPICE analog simulation and SystemVerilog real number model-based simulation; a Multi-Core App to reduce runtime for long-running high-activity tests; a Safety App for serial and concurrent fault simulation; PowerPlayback App for glitch-accurate power estimation of multi-billion gate SoC designs; and X-Pessimism Removal App to shorten debug time by making the propagation of “X” values in simulation more accurate.

Keysight Technologies updated its integrated design and simulation software to address increasing design complexity and higher frequencies in the radio frequency (RF) and microwave industry. PathWave Advanced Design System (ADS) 2023 includes enhancements to electromagnetic (EM) simulation for circuit designers, such as automation of EM-circuit co-simulation setup and a single unified environment for EM solvers and meshing technologies. It also streamlines integration of multi-technology circuit assembly and simulation into enterprise EDA design workflows. “PathWave ADS 2023 directly addresses the needs of customers developing multi-technology high speed, high-frequency designs,” said Joe Civello, director of RF and Microwave Simulation at Keysight. “This new solution offers workflow and simulation performance improvements that accelerate the design and simulation process while delivering the analysis results necessary to ensure designs meet critical electrical and thermal performance requirements.”

New startup MachineWare launched, offering a high-speed functional RISC-V simulator that enables software developers to test full software stacks, including firmware, operating system kernel, and complex user-space applications, in real time. Versions of its SIM-V tool are tailored to different use cases, from HPC RISC-V systems to 32-bit edge computing. The company is a spin off from RWTH Aachen’s Institute for Communication Technologies and Embedded Systems.

Primarius revealed a flexible design environment for custom memory and analog/mixed-signal IC design that integrates with the company’s circuit simulators and includes schematic entry, layout editing, and in-design physical verification. It also introduced an automated Pcell library development tool, a solution for standard cell library characterization and qualification, and a low-frequency dynamic noise measurement system.

Intel Foundry Services (IFS) introduced the IFS Cloud Alliance, which aims to enable secure design environments in the cloud. IFS will collaborate with partners to ensure that EDA tools are optimized to take advantage of the scalability of the cloud while meeting the requirements of Intel’s process design kits (PDKs). Initial members of the program include Amazon Web Services and Microsoft Azure, as well as EDA companies including Ansys, which made its tools, including RedHawk-SC, HFSS, Totem, PathFinder, VeloceRF, and RaptorX available as part of the interoperable, cloud-enabled semiconductor design flow, and Cadence, which made its design tools available to IFS users in a cloud-based environment. IFS said Siemens EDA and Synopsys are also taking part.

S2C debuted new FPGA prototyping software. The Prodigy Player Pro-7 suite breaks out Player Pro-RunTime, to strengthen prototype platform control and hardware test for its high-capacity platforms; Player Pro-CompileTime, to enhance the automation of multi-FPGA partitioning and pre/post-partition timing analysis; and Player Pro-DebugTime, to improve the efficiency of multi-FPGA debug probing and trace viewing with S2C’s MDM Pro debug tools.

Ansys’ Redhawk-SC and Totem power integrity platforms were certified for TSMC’s N3E and N4P process technologies, enabling sign off of voltage-drop, power noise, and electromigration reliability down to 3nm. In addition, Ansys’ multiphysics platform supports the TSMC N6RF Design Reference Flow for designing radio frequency (RF) chips with TSMC N6 process technology. The reference flow includes fast in-design analysis of electromagnetic coupling and the layout synthesis of coils, transmission lines, and other inductive circuit devices. It also supports circuit-under-inductor techniques that can significantly reduce the area and cost of an RF design.

Scania adopted Keysight’s Scienlab Battery Test Solutions for its new battery laboratory at its research and development facilities. Scania also leveraged Keysight’s PathWave Lab Operations for Battery Test, an integrated, web-based lab management platform that optimizes workflow, test throughput and data management. The new 1,000-square-meter laboratory includes three 250-square-meter test halls for battery cells, modules, and packs. The main focus is on battery performance and lifespan evaluation in various climatic conditions from -40°C to 70°C.

Photonics, HPC

Intel Labs announced new research on advancements in multiwavelength integrated optics, including the demonstration of an eight-wavelength distributed feedback (DFB) laser array that is fully integrated on a silicon wafer and delivers output power uniformity of +/- 0.25 decibel (dB) and wavelength spacing uniformity of ±6.5%. “This new research demonstrates that it’s possible to achieve well-matched output power with uniform and densely spaced wavelengths. Most importantly, this can be done using existing manufacturing and process controls in Intel’s fabs, thereby ensuring a clear path to volume production of the next-generation co-packaged optics and optical compute interconnect at scale,” said Haisheng Rong, senior principal engineer at Intel Labs.

The National Oceanic and Atmospheric Administration (NOAA) activated two new supercomputers for weather and climate modeling. The two Hewlett Packard Enterprise Cray supercomputers, called Dogwood and Cactus, utilize AMD EPYC 7742 processors and each run at 12.1 petaflops, a 3x improvement over the agency’s previous system. They are currently ranked as the 49th and 50th fastest computers in the world by TOP500. NOAA said the new systems will enable higher-resolution models that can better capture small-scale features like thunderstorms and use more realistic physics. The new supercomputers will enable an upgrade to the U.S. Global Forecast System this fall and the launch of a new hurricane forecast model called the Hurricane Analysis and Forecast System, slated to be in operation for the 2023 hurricane season pending tests and evaluation.

Memory & storage

eMemory subsidiary PUFsecurity and UMC announced a physical unclonable function (PUF) embedded flash solution. PUFflash integrates eMemory’s NeoPUF into UMC’s 55nm embedded flash technology to enhance the security of embedded flash applications with a PUF-based Root of Trust while maintaining the access speed of the embedded flash.

Weebit Nano taped out ReRAM demonstration chips with SkyWater’s 130nm CMOS process. The embedded ReRAM module includes a 256Kb ReRAM array, control logic, decoders, IOs and error correcting code (ECC). The demo chip comprises a full sub-system for embedded applications, including the ReRAM module, a RISC-V MCU, system interfaces, memories, and peripherals.

Micron Technology started shipping its 176-layer NAND SATA SSD designed for data center workloads. The company said the SSD has improved reliability and endurance.


Siemens Digital Industries Software is expanding its Xcelerator platform. In addition to the portfolio of products already under the Xcelerator banner, the platform will include a marketplace of IoT-enabled hardware, software, and digital services from an ecosystem of partners. Nvidia is taking part, and the companies will connect Xcelerator with Nvidia’s Omniverse platforms to create AI-enabled, photorealistic, physics-based digital twins. The first pilot will be a solution for BMW’s showcase electric vehicle manufacturing site in Debrecen, Hungary.

Cyberon Corporation’s continuous command-based voice user interface (VUI) toolchain is now available for Renesas Electronics’ entire RA MCU line, enabling the addition of voice-recognition to a variety of endpoint applications in home appliances, building automation, industrial automation, and wearables markets. Renesas is making a Voice Reference Hardware Platform available to enable rapid prototyping and development of voice interfaces. The new hardware platform enables local voice recognition without a network connection using Cyberon’s DSpotter solution.

Infineon uncorked a battery-powered Smart Alarm System, which it says provides high accuracy and very low-power operation using AI-based sensor fusion that combines a MEMS microphone and digital pressure sensor.

Canon selected AMD’s Versal AI Core series for its Free Viewpoint Video System for live sport broadcasts. The video system consists of a ring of high-resolution cameras that surround a stadium or arena to allow broadcast viewers to see the action on the field from any position or angle in the stadium.


Hailo and Renesas teamed up to incorporate Hailo-8 neural network acceleration processors with Renesas’ R-Car V3H & R-Car V4H SoCs for scalable, efficient ADAS solutions for zonal and centralized vehicular ECUs. The solutions are scalable for a wide range of ADAS functions from ADAS L2+ up to L4 AD functions requiring very high TOPS and good TOPS/W.

Renesas will collaborate with Tata Group’s Tata Motors and Tejas Networks to develop automotive electronics for electric and connected vehicles. Renesas and Tejas will work together on design and development of semiconductor solutions for radio units (RU) used in telecom networks, from 4G, 5G, to open radio access network (O-RAN). The companies aim to roll out products and solutions initially for India and aim to expand its footprint in the global markets.

Read more

Check out more of the week’s news at Manufacturing, Test and Auto, Security, Pervasive Computing.

The burden for ensuring IC reliability is shifting left, in the latest Systems & Design newsletter. Other stories highlight why getting hardware-dependent software right is critical and how the talent crunch is driving EDA to embrace big data.

Find out if analog can make a comeback in the latest Low Power-High Performance newsletter. Plus, read why thermal issues in DRAM are reaching a crisis point and whether the IP industry is ready to undergo a transformation.

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