Easing EV Range Anxiety Through Faster Charging


The automotive industry is developing new ways to boost the range of electric vehicles and the speed at which they are charged, overcoming buyer hesitation that has limited the total percentage of EVs to 18% of vehicles being sold.[1] Work is underway to improve how batteries are engineered and manufactured, and how they are managed while they are in use or being charged. This extends well b... » read more

New Embedded FPGA Compiler Maximizes IP Implementation Efficiency


When designing IP for system-on-chip (SoC) and application-specific integrated circuit (ASIC) implementations, IP designers strive for perfection. Optimal engineering often yields the smallest die area, thereby reducing both cost and power consumption while maximizing performance. Similarly, when incorporating embedded FPGA (eFPGA) IP into a SoC, designers prioritize these critical factors. ... » read more

Chip Industry Week In Review


Early version due to U.S. holiday. The U.S. government announced a new $504 million funding round for 12 Regional Technology and Innovation Hubs (Tech Hubs) for semiconductors, clean energy, biotechnology, AI, quantum computing, and more. Among the recipients: NY SMART I-Corridor Tech Hub (New York): $40 million for semiconductor manufacturing; Headwaters Hub (Montana): $41 million f... » read more

Thermal Challenges Multiply In Automotive, Embedded Devices


Embedding chips into stacked-die assemblies is creating thermal dissipation challenges that can reduce the reliability and lifespan of these devices, a growing problem as chipmakers begin cramming chiplets into advanced packages with thinner substrates between them. In the past, nearly all of these complex designs were used in tightly controlled environments, such as a large data center, whe... » read more

Chip Industry Week In Review


Samsung unveiled its latest 2nm and 4nm process nodes, plus its AI solutions during the Samsung Foundry Forum. The company also introduced an aggressive roadmap for the next few years that includes 3D-ICs with logic-on-logic, starting in 2025; custom HBM with built-in logic; backside power delivery on 2nm technology in 2027; and co-packaged optics. In presentations at the event, the company als... » read more

Secure Your SoC From Side Channel Attacks With Adaptable Security


Many SoC and ASIC manufacturers rely heavily on cryptographic solutions to safeguard sensitive IP and data transmission within their devices. In a dynamic landscape where threats from attackers continue to evolve, encryption algorithms play a crucial role in fortifying defenses. Hackers today are leveraging advanced physical tactics that extend beyond traditional data interception, posing signi... » read more

Using AI/ML To Combat Cyberattacks


Machine learning is being used by hackers to find weaknesses in chips and systems, but it also is starting to be used to prevent breaches by pinpointing hardware and software design flaws. To make this work, machine learning (ML) must be trained to identify vulnerabilities, both in hardware and software. With proper training, ML can detect cyber threats and prevent them from accessing critic... » read more

Overcoming Chiplet Integration Challenges With Adaptability


Chiplets are exploding in popularity due to key benefits such as lower cost, lower power, higher performance and greater flexibility to meet specific market requirements. More importantly, chiplets can reduce time-to-market, thus decreasing time-to-revenue! Heterogeneous and modular SoC design can accelerate innovation and adaptation for many companies. What’s not to like about chiplets? Well... » read more

Cut Power+Cost 5–10x: Integrate FPGA In Your SoC


You can integrate an FPGA in an SoC at full speed and flexibility. Until EFLX eFPGA, it was not possible to integrate full-speed, high-density FPGA in an SoC. Now you can. Click here to read more. » read more

Adapting To Evolving IC Requirements


As chip designs become increasingly heterogeneous and domain-specific, packing a device with one-size-fits-all chips or chiplets doesn't make sense. The key is rightsizing different components based on real workloads, so they don't waste power when there is too little utilization of logic, and so they don't struggle to complete tasks because they are undersized. Jayson Bethurem, vice president ... » read more

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