The Race To Accelerate


Geoff Tate, CEO of [getentity id="22921" e_name="Flex Logix"], sat down with Semiconductor Engineering to discuss how the chip industry is changing, why that bodes well for embedded FPGAs, and what you need to be aware of when using programmable logic on the same die as other devices. What follows are excerpts of that conversation. SE: What are the biggest challenges facing the chip industry... » read more

Introduction To eFPGA Hardware


Intel builds processor chips and Arm provides processor cores to integrate into chips. Xilinx and Intel (nee Altera) build FPGAs and a range of new startups provide embedded FPGA (eFPGA) to integrate into chips: Achronix, Flex Logix, Menta and QuickLogic. As the diagram above shows, an FPGA chip is a core (the “fabric”) which is surrounded by various kinds of I/O including SERDES,... » read more

The Week In Review: Design


Security Addressing the Meltdown and Spectre speculative execution vulnerabilities has not gone smoothly. Intel's firmware update caused unexpected behavior and a higher than expected number of reboots for its Haswell and Broadwell chips, leading the company to recommend users stop patching until an updated version of the patch is available. Microsoft's attempts to fix the issue left some W... » read more

Tech Talk: Debugging ASICs With Embedded FPGAs


Valy Ossman, senior architecture and applications engineer at Flex Logix, discusses the advantages of debugging an ASIC using an embedded FPGA, including time to market, flexibility in design, and after-market changes. https://youtu.be/XGhFcirS9Vg » read more

The Importance Of Metal Stack Compatibility For Semi IP


Architects and front end designers usually leave the back end to the physical designers: they know there can be different numbers of metal layers, but may not realize the characteristics of each metal layer may vary layer by layer as well and that different chips use different metal stack ups to optimize for their requirements. This slide from IDF14 shows a simple summary of the breadth of v... » read more

Reflection On 2017: Design And EDA


People love to make predictions, and most of the time they have it easy, but at Semiconductor Engineering, we ask them to look back on the predictions they make each year and to assess how close to the mark they were. We see what they missed and what surprised them. Not everyone accepts our offer to grade themselves, but most have this year. (Part one looked at the predictions associated with s... » read more

Get eFPGA With Your CPU Now


eFPGA is available now on mainstream process nodes (40, 28 and 16), in sizes from 200 LUTs to 200K LUTs and with options for DSP and RAM integration to fit almost any customer need. Flex Logix has been working for some time with multiple customers on integrating eFPGA with their CPUs: ARM, RISC-V, Tensilica and others. Bus interfaces include AXI, AHB, APB and TL. Our lead customer has workin... » read more

The New Road Warriors


Chip vendors and other companies that have little or no experience in automotive are flooding into this market as the race for assisted and autonomous driving begins to heat up. This market is expected to pay big dividends for companies that succeed in helping to build the vehicles of the future in this century. IC Insights earlier this year forecast the auto chip market would grow 22% this ... » read more

The Next Phase Of Machine Learning


Machine learning is all about doing complex calculations on huge volumes of data with increasing efficiency, and with a growing stockpile of success stories it has rapidly evolved from a rather obscure computer science concept into the go-to method for everything from facial recognition technology to autonomous cars. [getkc id="305" kc_name="Machine learning"] can apply to every corporate fu... » read more

eFPGA IP Density, Portability And Scalability


FPGA chip companies generally build a new generation of FPGAs every ~3 years when there is a major advance in process technology. They pick one foundry, one node, one variation of that node and do full-custom circuit design with typically the maximum or near-maximum number of metal layers in order to get the highest density FPGA they can. It takes them most of the 3 years to do the complex e... » read more

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