Week In Review: Design, Low Power

Tools & IP Cadence unveiled ten two verification IP (VIP) to support hyperscale data centers, automotive, and consumer and mobile applications. The new VIPs include complete bus functional models, integrated protocol checks and coverage models, and a specification-compliant verification plan. The VIPs cover CXL, HBM3, Ethernet 802.3ck, CSI-2 3.0, MIPI I3C 1.1, TileLink, eUSB2, UFS 3.1, MIP... » read more

Week In Review: Design, Low Power

Aldec launched the HES-MPF500-M2S150 Development Kit for early co-development and co-verification of hardware and software for FPGA-based embedded systems that will use devices from either or both of Microchip’s PolarFire or SmartFusion2 families. The HES-MPF500-M2S150 Development Kit features Microchip’s low power PolarFire MPF500T FCG1152 FPGA, which has 481k logic elements, 1480 math blo... » read more

Week In Review: Design, Low Power

M&A SMIT Holdings acquired S2C, a provider of FPGA prototyping hardware and software as well as interfaces and accessories, for $19 million, plus up to US$2 million in milestone based payments to the key management team. S2C was founded in 2003. SMIT, based in Hong Kong, makes pay TV broadcasting access and mobile point-of-sale payment systems for the Chinese market. Tools & IP Syn... » read more

The Week In Review: Design/IoT

Mentor Graphics began selling infrastructure hardware this week, including an end-to-end IoT solution that includes a reference design for a customizable gateway, a cloud backend, and runtime solutions on which to build a wide array of IoT edge devices. Mentor also released virtual platforms for Altera's Arria 10 SoC FPGA, and updated its Valor PCB manufacturing process to focus on Industry 4.0... » read more

FPGA’s Role Expands

For more than a decade FPGA vendors argued that FPGAs would become a viable alternative to ASICs, adding programmability along with the same kind of advances in performance and power that ASICs saw at each new process node. While that never played out as they expected, FPGAs nonetheless have carved out a formidable position in the semiconductor market. Generally speaking, FPGAs today are us... » read more

IP Verification Challenges

At the Design Automation Conference this year, the Designer and IP tracks were the stars of the show in many ways. These sessions catered to industry rather than academia and provided engineers with information they could directly use in their jobs. Many of the sessions were filled to capacity and Anne Cirkel, general chair for the 52nd DAC, was enthusiastic about the growing success of these t... » read more

Week 27: Announcing DAC TV

I’m just back from a few days in San Jose, which luckily is only a short flight away from Portland. After so many of these trips I've found that most of the time I'm surrounded by familiar faces and the one or two flustered employees that couldn’t catch their much more convenient corporate commuter flight. I have to admit the idea of bypassing airport security and just showing my badge, gra... » read more

Something Is Cooking

I’m sure you are all eager to hear a report from the DAC Executive Committee meeting last week in Portland. The important things first: The weather was great and the team cooking event – it’s hard to imagine a better team-building exercise – was a ton of fun. Nobody threw food at me and we had no accidents in the kitchen…well, except for the fact that Ramesh Karri, our security chair,... » read more