Swapping Out Chiplets: I/Os Vs. Compute


Key Takeaways: Companies can save time and money by swapping out a compute, memory, or I/O chiplet to gain technology improvements, while keeping the other dies stable. Chip architects may choose to keep their I/Os stable and swap out compute to move from a 5nm process node to 3nm to achieve performance and power improvements, or swap out memory from LPDDR5X to LPDDR6. Swapping out... » read more

Why Your NoC Verification Strategy Must Consider Using Formal


By Ashish Darbari and Bing Xue It’d be inconceivable these days to design a modern high-performance SoC without a network-on-chip (NoC) fabric. AI hyperscalers are inherently multi-threaded and rely on using hundreds of processing elements (PEs). Crossbar-based fabric would just not scale. What also changes with the adoption of the NoC is how to handle coherency between PEs. ACE is no long... » read more

Confusion Grows With More Interconnect Options And Tradeoffs


Key Takeaways: Designers are frequently evaluating 5 or more different interconnects in a single system, each with a distinct purpose. While chip-to-chip (PCIe) and die-to-die (UCIe, BoW) technologies seem to be solving a similar problem, in practice they bring different challenges. PCIe, CXL, NVLink, and UALink are all active in the hyperscaler space, but Ethernet-based technologies... » read more

Chip Industry Week in Review


Advanced nodes and capacity The US Commerce Dept. told IC equipment makers to stop shipments to Hua Hong Group, China's No. 2 chipmaker, in order to protect America's lead, according to Reuters. Global AI competition is causing wafer and packaging shortages, but capacity increases are expected to come online later this year and in 2027 to ease the crunch, according to TrendForce. Leadi... » read more

Why Proof Convergence Matters


Achieving a deterministic "yes or no" answer in semiconductor verification is becoming more challenging as chip complexity increases. There are more cores, more potential interactions, and more reliance on AI to build AI chips. Ashish Darbari, CEO of Axiomise, talks about the impact of functional interactions involving safety and security, and where to look for common patterns to prevent bugs f... » read more

Chip Industry Week In Review


War impacts The Iran War's toll on the chip industry is widening. Over 95% of Taiwan's energy is imported, causing the country to secure alternative sources. Korea is also heavily dependent on energy imports from the Middle East. Shortages of key materials are cropping up everywhere. Helium from Qatar, the second largest producer behind the U.S., is constrained by hostilities in the Per... » read more

Formal Verification First: How AI Supports But Cannot Replace It


At a recent VLSI-D panel, industry leaders explored one of the most pressing topics in silicon design today — the intersection of AI-powered EDA, which is revolutionizing chip design for tomorrow. Ashish Darbari, CEO of Axiomise, questioned the panelists on the role of AI in chip design, optimizing PPA, validation and verification. While the panel explored the role of AI in design implemen... » read more

Does Your RISC-V Core Meet The Standard?


Key Takeaways Architectural conformance and implementation verification are necessary but different for RISC-V designs, yet few verification engineers have experience on the conformance side. While RISC-V enables flexibility, there is a potential for ecosystem fragmentation. It is mathematically impossible to test every instruction combination, so engineers are moving beyond just "bl... » read more

Chip Industry Week in Review


SIA's latest monthly global semiconductor sales report reflects a ~30% YOY increase, hitting a record $75.3B in November 2025. Asia Pacific had a notable 66% increase. Cadence launched its Chiplet Spec-to-Packaged Parts ecosystem to accelerate time to market for chiplet development for physical AI, data centers, and HPC applications. Initial IP partners joining Cadence include Arm, Arteris, ... » read more

Chip Industry’s Top Videos 2025


Rising complexity, new architectures, and AI's permeation of nearly everything left engineers struggling to keep up in 2025, as evidenced by this year's viewership numbers. Among the hottest topics were verification, agentic AI, DRAM/HBM, optimization of data movement, chiplets, and heterogeneous integration, but there was steady traffic growth across all sectors. Top 10 most-watched videos ... » read more

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