Chip Industry Technical Paper Roundup: Apr. 1


New technical papers recently added to Semiconductor Engineering’s library: [table id=416 /] Find more semiconductor research papers here. » read more

GPU Analysis Identifying Performance Bottlenecks That Cause Throughput Plateaus In Large-Batch Inference


A new technical paper titled "Mind the Memory Gap: Unveiling GPU Bottlenecks in Large-Batch LLM Inference" was published by researchers at Barcelona Supercomputing Center, Universitat Politecnica de Catalunya, and IBM Research. Abstract "Large language models have been widely adopted across different tasks, but their auto-regressive generation nature often leads to inefficient resource util... » read more

Chip Industry Technical Paper Roundup: Mar. 4


New technical papers recently added to Semiconductor Engineering’s library: [table id=410 /] Find more semiconductor research papers here. » read more

RISC-V High Performance Multicore and GPU SoC Platform For Safety Critical System


A new technical paper titled "A RISC-V Multicore and GPU SoC Platform with a Qualifiable Software Stack for Safety Critical Systems" published by researchers at Universitat Politecnica de Catalunya and Barcelona Supercomputing Center. Abstract "In the context of the Horizon Europe project, METASAT, a hardware platform was developed as a prototype of future space systems. The platform is bas... » read more

Chip Industry Week In Review


Worldwide silicon wafer shipments declined nearly 2.7% to 12,266 million square inches in 2024, with wafer revenue contracting 6.5% to $11.5 billion, according to the SEMI Silicon Manufacturers Group. CSIS released a new report, “Critical Minerals and the Future of the U.S. Economy,” with detailed analysis and policy recommendations for building a secure mineral supply chain for semicond... » read more

Chip Industry Technical Paper Roundup: May 28


New technical papers added to Semiconductor Engineering’s library this week. [table id=229 /] More ReadingTechnical Paper Library home » read more

Memory System Benchmarking, Simulation, And Application Profiling Via A Memory Stress Framework


A technical paper titled “A Mess of Memory System Benchmarking, Simulation and Application Profiling” was published by researchers at Barcelona Supercomputing Center, Unversitat Politecnica de Catalunya, and Micron Technology (Italy). Abstract: "The Memory stress (Mess) framework provides a unified view of the memory system benchmarking, simulation and application profiling. The Mess benc... » read more

Chip Industry Technical Paper Roundup: Feb. 19


New technical papers added to Semiconductor Engineering’s library this week. [table id=199 /] More ReadingTechnical Paper Library home » read more

FPGA-Based HW/SW Platform For Pre-Silicon Emulation Of RISC-V Designs (Barcelona Supercomputing Center)


A technical paper titled “Makinote: An FPGA-Based HW/SW Platform for Pre-Silicon Emulation of RISC-V Designs” was published by researchers at Barcelona Supercomputing Center and Universitat Politècnica de Catalunya. Abstract: "Emulating chip functionality before silicon production is crucial, especially with the increasing prevalence of RISC-V-based designs. FPGAs are promising candidate... » read more

Chip Industry Week In Review


By Jesse Allen, Karen Heyman, and Liz Allan More than 1 billion generative AI smartphones are expected be shipped during 2024 to 2027, reports Counterpoint. The share of GenAI smartphones will be 4% of the market in 2023 and is likely to double in 2024, with Samsung capturing half the market, followed by Chinese OEMs. By 2027, GenAI smartphones could account for 40% of the market. Global ... » read more

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