tag: Barcelona Supercomputing Center

Chip Industry Technical Paper Roundup: May 28
By Linda Christensen - 28 May, 2024 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=229 /] More ReadingTechnical Paper Library home » read more

Memory System Benchmarking, Simulation, And Application Profiling Via A Memory Stress Framework
By Technical Paper Link - 22 May, 2024 - Comments: 0

A technical paper titled “A Mess of Memory System Benchmarking, Simulation and Application Profiling” was published by researchers at Barcelona Supercomputing Center, Unversitat Politecnica de Catalunya, and Micron Technology (Italy). Abstract: "The Memory stress (Mess) framework provides a unified view of the memory system benchmarking, simulation and application profiling. The Mess benc... » read more

Chip Industry Technical Paper Roundup: Feb. 19
By Liz Allan - 19 Feb, 2024 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=199 /] More ReadingTechnical Paper Library home » read more

FPGA-Based HW/SW Platform For Pre-Silicon Emulation Of RISC-V Designs (Barcelona Supercomputing Center)
By Technical Paper Link - 15 Feb, 2024 - Comments: 0

A technical paper titled “Makinote: An FPGA-Based HW/SW Platform for Pre-Silicon Emulation of RISC-V Designs” was published by researchers at Barcelona Supercomputing Center and Universitat Politècnica de Catalunya. Abstract: "Emulating chip functionality before silicon production is crucial, especially with the increasing prevalence of RISC-V-based designs. FPGAs are promising candidate... » read more

Chip Industry Week In Review
By The SE Staff - 22 Dec, 2023 - Comments: 0

By Jesse Allen, Karen Heyman, and Liz Allan More than 1 billion generative AI smartphones are expected be shipped during 2024 to 2027, reports Counterpoint. The share of GenAI smartphones will be 4% of the market in 2023 and is likely to double in 2024, with Samsung capturing half the market, followed by Chinese OEMs. By 2027, GenAI smartphones could account for 40% of the market. Global ... » read more

Chip Industry’s Technical Paper Roundup: October 31
By Liz Allan - 31 Oct, 2023 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=159 /] More Reading Technical Paper Library home » read more

FPGA-Proven RISC-V System With Hardware Accelerated Task Scheduling
By Technical Paper Link - 24 Oct, 2023 - Comments: 0

A technical paper titled “Enabling HW-based Task Scheduling in Large Multicore Architectures” was published by researchers at Barcelona Supercomputing Center, University of Campinas, University of Sao Paulo, and Arteris Inc. Abstract: "Dynamic Task Scheduling is an enticing programming model aiming to ease the development of parallel programs with intrinsically irregular or data-dependent... » read more

Chip Industry’s Technical Paper Roundup: August 9
By Liz Allan - 09 Aug, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=124 /] More Reading Technical Paper Library home » read more

A Safety Island For Safe Use of HPC Devices For Safety-Critical Systems with RISC-V
By Technical Paper Link - 02 Aug, 2023 - Comments: 0

A technical paper titled “Envisioning a Safety Island to Enable HPC Devices in Safety-Critical Domains” was published by researchers at Barcelona Supercomputing Center and Intel. Abstract: "HPC (High Performance Computing) devices increasingly become the only alternative to deliver the performance needed in safety-critical autonomous systems (e.g., autonomous cars, unmanned planes) du... » read more

Chip Industry’s Technical Paper Roundup: June 20
By Liz Allan - 20 Jun, 2023 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=112 /] » read more

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