On-Chip Monitoring Of FinFETs


Stephen Crosher, CEO of Moortec, sat down with Semiconductor Engineering to discuss on-chip monitoring and its impact on power, security and reliability, including predictive maintenance. What follows are excerpts of that conversation. SE: What new problems are you seeing in design? Crosher: There are challenges emerging for companies working on advanced nodes, including scaling and trans... » read more

The Role Of Cobalt In Enabling AI


We are on the cusp of the biggest computing wave yet — the AI era driven by Big Data. Enabling this era will require significant enhancements in processor performance and in the capacity and latency of memory. These requirements are coming at a time when the industry is being increasingly challenged by a slowdown in classic Moore’s Law scaling. What’s needed to continue driving the indust... » read more

The Era Of Data, By The Numbers


Standing-room only keynote speeches. A future awash in data amassed by transformative technologies and applications, with semiconductors at their core. Smart everything: Cars, medicine, manufacturing, workforce, you name it. The sheer numbers impressed as a record lineup of SEMICON West keynote speakers offered a glowing portrait of the future: The semiconductor industry stands on the cusp o... » read more

Smaller, Faster, Cheaper—But Different


The old mantra of "smaller, faster, cheaper" has migrated from the chip level to the electronic system level, raising some interesting questions about where the real value is being generated. Smaller as it pertains to gate size, line widths and spaces, will continue in an almost straight line for at least the next decade. The ability to print three-dimensional features on a nanoscale using E... » read more

Deep Learning Market Forces


Last week, eSilicon participated in a deep learning event at the Computer History Museum – “ASICs Unlock Deep Learning Innovation.” Along with Samsung, Amkor Technology and Northwest Logic, we explored how our respective companies form an ecosystem to develop deep learning chips for the next generation of applications. We also had a keynote presentation on deep learning from Ty Garibay, C... » read more

Can Big Data Help Coverage Closure?


Semiconductor designs are a combination of very large numbers and very small numbers. There is a large numbers of transistors at very small sizes, and databases are often large. The chip industry has been looking at [getkc id="305" kc_name="machine learning"] to effectively manage some of this data, but so far datasets have not been properly tagged across the industry and there is a reluctan... » read more

Using Data Mining Differently


The semiconductor industry generates a tremendous quantity of data, but until very recently engineers had to sort through it on their own to spot patterns, trends and aberrations. That's beginning to change as chipmakers develop their own solutions or partner with others to effectively mine this data. Adding some structure and automation around all of this data is long overdue. Data mining h... » read more

Data Buffering’s Role Grows


Data buffering is gaining ground as a way to speed up the processing of increasingly large quantities of data. In simple terms, a data buffer is an area of physical [getkc id="22" kc_name="memory"] storage that temporarily stores data while it is being moved from one place to another. This becomes increasingly necessary in data centers, autonomous vehicles, and for [getkc id="305" kc_name=... » read more

How To Deal With The Flood Of Analog Data


Analog data from a variety of sensors and other devices is a huge problem. Here are three approaches to overcoming the problems that big analog data can cause. Approach 1: Analyze at the Edge A lot of data can be collected at the point of capture, but most of it’s uninteresting. You can save and analyze it all or you can take advantage of intelligent embedded software that constantly meas... » read more

Full-Chip Power Integrity And Reliability Signoff


As designs increase in complexity to cater to the insatiable need for more compute power — which is being driven by different AI applications ranging from data centers to self-driving cars—designers are constantly faced with the challenge of meeting the elusive power, performance and area (PPA) targets. PPA over-design has repercussions resulting in increased product cost as well as pote... » read more

← Older posts Newer posts →