tag: Brewer Science

Defect Mitigation And Characterization In Silicon Hardmask Materials
By Brewer Science - 17 Mar, 2021 - Comments: 0

From SPIE Digital Library: In this study, metal contaminants, liquid particle count and on-wafer defects of Si- HMs and filtration removal rates are monitored to determine the effect of filter type, pore size, media morphology, and cleanliness on filtration performance. 5-nm PTFE NTD2 filter having proprietary surface treatment used in this study shows lowest defect count. Authors: Vineet... » read more

Hunting For Open Defects In Advanced Packages
By Anne Meixner - 17 Mar, 2021 - Comments: 5

Catching all defects in chip packaging is becoming more difficult, requiring a mix of electrical tests, metrology screening, and various types of inspection. And the more critical the application for these chips, the greater the effort and the cost. Latent open defects continue to be the bane of test, quality, and reliability engineering. Open defects in packages occur at the chip-to-substra... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 05 Mar, 2021 - Comments: 0

Government policy The National Security Commission on Artificial Intelligence (NSCAI) this week submitted its final report to Congress and the President. The goal is to develop a national strategy to maintain America’s AI advantages related to national security. As part of the long and complex report, the NSCAI came to a sobering conclusion: “The U.S. government is not prepared to defend t... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 05 Mar, 2021 - Comments: 0

Automotive/Mobility Chip-telemetry company proteanTecs has joined TSMC’s IP Alliance Program, which puts proteanTecs’ Universal Chip Telemetry (UCT) IP into TSMC’s catalog of production-proven IP. UCT is a monitoring system designed directly into chips to pull measurements from inside the chip throughout its lifecycle, including after placement in systems in the field. Monitoring the hea... » read more

Breaking The 2nm Barrier
By Mark LaPedus - 18 Feb, 2021 - Comments: 4

Chipmakers continue to make advancements with transistor technologies at the latest process nodes, but the interconnects within these structures are struggling to keep pace. The chip industry is working on several technologies to solve the interconnect bottleneck, but many of those solutions are still in R&D and may not appear for some time — possibly not until 2nm, which is expected t... » read more

Marangoni Effect-Based Under-Layer For A Dual Damascene Via-First Approach
By Brewer Science - 17 Feb, 2021 - Comments: 0

One of the main challenges of a Dual Damascene (DD) via-first process is the control of the Critical Dimensions (CDs) in the lithography of the trenches. The PhotoResist (PhR) thickness presents variations from the via arrays to the open areas, which cause the variation of CDs: the swing effect. The planarization of a DD via-first process is reported. A dual-layer solution is used to demonstrat... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 12 Feb, 2021 - Comments: 0

Chipmakers The U.S. Semiconductor Industry Association (SIA) and several chip executives have sent a joint letter to President Biden, urging the administration to include substantial funding for semiconductor manufacturing and research in the U.S. As reported, the share of global semiconductor manufacturing capacity in the U.S. has decreased from 37% in 1990 to 12% today. “Semiconductors pow... » read more

The Good, Bad And Unknowns Of Flexible Devices
By Ed Sperling - 27 Jan, 2021 - Comments: 0

Flexible hybrid electronics are beginning to proliferate in consumer, medical, and industrial applications due to their comparatively low weight, thin profile, and the ability to literally bend the rules of design. Open any smart phone today and you're likely to find one or more of these flexible boards. Unlike standard printed circuit boards, FHE devices are printed using a combination of r... » read more

Eyes On Zero Defects: Defect Detection And Characterization Metrology
By Darin Collins - 21 Jan, 2021 - Comments: 0

By Darin Collins and Jessica Albright Metrology is the science of measuring, characterizing, and analyzing materials. Within metrology, there are several technologies used to detect material defects on a very small scale – precision on the scale of parts per trillion or less is necessary in the pursuit of zero defects. We broadly define our characterization approach into three main categor... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 15 Jan, 2021 - Comments: 0

Chipmakers and OEMs Intel has appointed Pat Gelsinger as its new chief executive, effective Feb. 15. Gelsinger will also join Intel’s board upon assuming the role. He will succeed Bob Swan, who will remain CEO until Feb. 15. Most recently, Gelsinger served as the CEO of VMware since 2012. He also spent 30 years at Intel, becoming the company’s first chief technology officer. The move fo... » read more

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