Chiplets Add More Inspection And Test Steps


Key Takeaways Ensuring the reliability of multi-die assemblies requires a variety of approaches to detect subsurface defects. Bonds and interconnects are especially problematic and require more inspection insertions. Ensuring reliability requires connecting fragmented data that is often siloed. The shift to multi-die assemblies is forcing changes in how chips are tested and ... » read more

Surface Metrology for Hybrid Bonding in Advanced Semiconductor Packaging


Achieving a reliable hybrid bond requires both surfaces to be pristine. To support this requirement, metrology methods such as atomic force microscopy (AFM) and atomic force profilometry (AFP) are critical for surface characterization and process optimization. AFM delivers localized, high-resolution surface measurements, while AFP provides complementary large-area topography scans that ... » read more

Metrology Digs Deep To Produce Next-Generation 3D NAND


Each generation of 3D NAND packs about 30% more bits than the previous version, with current devices storing up to 2 terabits of data in a die the size of a fingernail. With new product introductions shrinking from 18 months to every 12 months, chipmakers are constantly innovating to enable this prodigious scaling pace. 3D NAND technology is a core ingredient in mobile phones, solid-state dr... » read more

Chip Industry Week In Review


China's Hefei Lumiverse Technology reportedly has developed a desktop-sized High Harmonic Generation light source that generates wavelengths as small as 1nm. One customer already has used it to produce 14nm chips, which was the original target node for EUV, according to one report. As a point of comparison, TSMC and Samsung didn't start using EUV until the 7nm node, relying instead on immersion... » read more

HBM Leads The Way To Defect-Free Bumps


High-bandwidth memory stands at the forefront of multiple technology developments as a critical enabler of AI, but it is one of the most difficult modules to manufacture. Leading HBM device makers and foundries must simultaneously handle multi-layer chip stacking, die warpage, and shorter product lifecycles that are shrinking from two years down to just one. But perhaps the most formidable c... » read more

Chip Industry Week in Review


San Francisco-based Substrate raised more than $100 million to build a vertically integrated foundry that uses particle accelerators to produce "the world's brightest beams, enabling a new method of advanced X-ray lithography." The company claims its technology is comparable to ASML's high NA EUV, and notes it can extend well beyond 2nm. ASML has not publicly commented. The Nexperia chip sho... » read more

Metrology’s Growing Role In Reducing False Defects


When a good die fails test and gets scrapped, often no one notices, because false failures look identical to real ones. Yet across the industry, these phantom defects are quietly eroding yield, inflating test costs, and masking the true health of manufacturing processes. At advanced nodes and in heterogeneous packaging, where margins are already razor-thin, even minor variations in contact r... » read more

Chip Industry Week In Review


U.S. Trade Representative Jamieson Greer warned Southeast Asian semiconductor manufacturers that they must shift production to the U.S. or face new punitive tariffs, reports the South China Morning Post. President Trump previously floated a 100% tariff on imported chips. Malaysia and other regional economies are offering large concessions and promises of U.S. goods purchases in hopes of securin... » read more

Metrology Under Pressure: Detecting Defects in Fine-Pitch Hybrid Bonding


As advanced packaging pushes deeper into the sub-10µm realm, traditional inspection and metrology systems are being forced to evolve with it. Hybrid bonding, a critical enabler of vertical integration and 3D system performance, relies on exceptionally tight alignment and defect-free bonding surfaces. But as interconnect pitch shrinks, even nanometer-scale variations in height, tilt, or cont... » read more

Chip Industry Week in Review


Apple plans to increase its U.S. investment by an additional $100 billion over four years, which includes the launch of an advanced manufacturing supply chain program, spurring a number of related chip industry announcements, including: Apple will invest in Amkor's new packaging and test facility in Arizona as its first and largest customer, and Amkor will package and test Apple silicon pr... » read more

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