tag: Bruker

Chip Industry Week In Review
By The SE Staff - 22 Sep, 2023 - Comments: 0

By Jesse Allen, Karen Heyman, and Liz Allan The U.S. Department of Defense (DOD) announced $238 million in awards toward establishing eight regional innovation hubs under the CHIPS and Science Act. The hubs aim to accelerate hardware prototyping and "lab-to-fab" transition of semiconductor technologies for secure edge/IoT, 5G/6G, AI hardware, quantum technology, electromagnetic warfare, and ... » read more

Fab And Field Data Transforming Manufacturing Processes
By Gregory Haley - 12 Sep, 2023 - Comments: 0

The ability to capture, process, and analyze data in the field is transforming semiconductor metrology and testing, providing invaluable insight into a product's performance in real-time and under real-world conditions and use cases. Historically, data that encapsulates parameters such as power consumption, temperature, voltages, currents, timing, and other characteristics, was confined to d... » read more

SiC Growth For EVs Is Stressing Manufacturing
By Anne Meixner - 08 Aug, 2023 - Comments: 0

The electrification of vehicles is fueling demand for silicon carbide power ICs, but it also is creating challenges in finding and identifying defects in those chips. Coinciding with this is a growing awareness about just how immature SiC technology is and how much work still needs to be done — and how quickly that has to happen. Automakers are pushing heavily into electric vehicles, and t... » read more

Week In Review: Semiconductor Manufacturing, Test
By Gregory Haley - 07 Jul, 2023 - Comments: 0

China retaliated against a U.S. embargo on advanced semiconductor equipment exports by restricting exports of gallium and germanium. Both metals are widely used in semiconductors and electric vehicles. Despite export controls for advanced chips and equipment imposed on Chinese foundries by the U.S. and its allies, TrendForce predicts China's 300mm market share likely will increase from 24% ... » read more

Week In Review: Semiconductor Manufacturing, Test
By Gregory Haley - 09 Jun, 2023 - Comments: 0

The European Union’s Chips Act Commission has approved €8.1 billion ($8.73 billion) in funding for an Important Project of Common European Interest (IPCEI). As part of this IPCEI, 56 companies, including small and medium-sized enterprises (‘SMEs') and start-ups, will undertake 68 projects in research, innovation, and deployment of microelectronics and communication technologies across th... » read more

From Lab To Fab: Increasing Pressure To Fuse IC Processes
By Gregory Haley - 06 Jun, 2023 - Comments: 0

Test, metrology, and inspection are essential for both the lab and the fab, but fusing them together so that data created in one is easily transferred to the other is a massive challenge. The chip industry has been striving to bridge these separate worlds for years, but the economics, speed, and complexity of change require a new approach. The never-ending push toward smaller, better-defined... » read more

MEMS Device Cleaning
By Bruker - 06 Jun, 2023 - Comments: 0

Cleaning is an essential process for MEMS applications in order to prevent device failure due to foreign material. Small particles located on MEMS devices are significant causes of device rejection and yield loss. These issues affect inertial devices, such as accelerometers and gyroscopes, as well as microphones, laser bars and other MEMS devices. Click here to download. » read more

Chip Industry’s Technical Paper Roundup: June 5
By Linda Christensen - 05 Jun, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=105 /] More Reading Technical Paper Library home » read more

3D Memory Structures: Common Hole And Tilt Metrology Techniques and Capabilities
By Technical Paper Link - 03 Jun, 2023 - Comments: 0

A technical paper titled "Inline metrology of high aspect ratio hole tilt and center line shift using small-angle x-ray scattering" was published by researchers at Bruker Nano and Lam Research. Abstract: "High aspect ratio (HAR) structures found in three-dimensional nand memory structures have unique process control challenges. The etch used to fabricate channel holes several microns deep... » read more

Challenges Grow For Creating Smaller Bumps For Flip Chips
By Anne Meixner - 18 May, 2023 - Comments: 0

New bump structures are being developed to enable higher interconnect densities in flip-chip packaging, but they are complex, expensive, and increasingly difficult to manufacture. For products with high pin counts, flip-chip [1] packages have long been a popular choice because they utilize the whole die area for interconnect. The technology has been in use since the 1970s, starting with IBM�... » read more

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