tag: Cadence

Supporting CPUs Plus FPGAs (Part 3)
By Brian Bailey - 19 Apr, 2017 - Comments: 0

While it has been possible to pair a CPU and FPGA for quite some time, two things have changed recently. First, the industry has reduced the latency of the connection between them and second, we now appear to have the killer app for this combination. Semiconductor Engineering sat down to discuss these changes and the state of the tool chain to support this combination, with Kent Orthner, system... » read more

Blog Review: April 19
By Jesse Allen - 19 Apr, 2017 - Comments: 0

Mentor's Tom Fitzpatrick explains what the Portable Stimulus standard will do, what it won't, and why the choice of input language defined by the standard matters. Cadence's Paul McLellan listens in as IRDS chairman Paolo Gargini explains how long it takes technology breakthroughs to make out of the lab and into high-volume manufacturing. Synopsys' Robert Vamosi points to the recent sound... » read more

The Hunt For A Low-Power PHY
By Brian Bailey - 17 Apr, 2017 - Comments: 0

Physics has been on the side of chipmakers throughout most of the lifetime of [getkc id="74" comment="Moore's Law"], but when dealing with the world outside the chip, physics is working against them. Pushing data at ever-faster rates through boards and systems consumes increasing amounts of power, but the power budget for chips has not been increasing. Could chips be constrained by their int... » read more

The Week In Review: Design
By Jesse Allen - 14 Apr, 2017 - Comments: 0

M&A Synapse Design acquired Asilicon, a design services firm based in Ranchi Jharkhand, India. Through the acquisition, Synapse Design adds a second design center in India and gains an additional 80 engineers. "The focus of the Ranchi office will be to provide lower-cost offshore design center services for our customer's designs targeting 7- and 10-nm process technology," said Satish Bag... » read more

The Hidden Costs Of Security
By Ed Sperling - 13 Apr, 2017 - Comments: 0

There is no argument these days among chipmakers that security needs to be implemented at every level. So why isn't it happening? The answer is more complex than companies pinching pennies, although that is certainly a factor for some chips. The reality, though, is security carries a price for every facet of semiconductor design—power, performance and area. And the impact reaches much furt... » read more

Understanding Voltage Drop Mechanics
By Ann Mutschler - 13 Apr, 2017 - Comments: 0

As a fundamental concept of electronic design, voltage drop ranks highly as one to understand well. I particularly appreciate when industry folks come up with creative ways to get the point across. Jerry Zhao, a product management director at Cadence and I were discussing how to best manage dynamic and static voltage drop, but I first asked him to explain the difference between the two. I p... » read more

The Efficiency Problem
By Samer Hijazi - 13 Apr, 2017 - Comments: 0

The field of automotive automation has been the driver – so to speak – of the next leap of innovation in the field of transportation. Car architectures are being re-engineered to take advantage of incredible leaps in automation, using more powerful processors that process more data than ever before. The recent focus on autonomous automobile technology could be due to the ongoing drop in ... » read more

The Problem With Clocks
By Brian Bailey - 13 Apr, 2017 - Comments: 1

The synchronous digital design paradigm has enabled us to design circuits that are well controlled, but that is only true if the clocks themselves are well controlled. While overdesign techniques ensured that to be the case in early ASIC development, designs today cannot afford such luxuries. As we strive for lower power and higher operating frequencies, the clock has become a critical desig... » read more

Managing Voltage Drop At 10/7nm
By Ann Mutschler - 13 Apr, 2017 - Comments: 0

Power integrity is becoming a bigger problem at 10/7nm because existing tools such as static analysis no longer are sufficient. Power integrity is a function of static and dynamic voltage drop in the power delivery network. And until recently, static analysis did an effective job in measuring the overall robustness of PDN connectivity. As such, it is a proxy for PDN strength. The problem is ... » read more

Electric Vehicles Set The Pace
By Gale Morrison - 13 Apr, 2017 - Comments: 0

Electric vehicles are leading the charge for innovation in automotive electronics. Companies that invested and embraced the challenge of EVs are besting their less-nimble, less-open-minded engineering cohorts. Semiconductors and embedded computers have been controlling the dashboard, mirrors, seats, heating and cooling for years. But with EVs, engineering teams are starting to tackle tas... » read more

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