tag: Cadence

EDA’s Role Grows For Preventing And Identifying Failures
By Karen Heyman - 08 Jun, 2023 - Comments: 0

The front end of design is becoming more tightly integrated with the back end of manufacturing, driven by the rising cost and impact of failures in advanced chips and critical applications. Ironically, the starting point for this shift is failure analysis (FA), which typically happens when a device fails to yield, or worse, when it is returned due to some problem. In production, that leads t... » read more

Blog Review: June 7
By Jesse Allen - 07 Jun, 2023 - Comments: 0

Synopsys' Kenneth Larsen and Powerchip's S.Z. Chang explore wafer-on-wafer (WoW) and chip-on-wafer (CoW), 3D hybrid bonding schemes that can be used to stack memory on logic with shorter signal transmission distance at no wasted power and more interconnect and bandwidth density. In a podcast, Siemens' Conor Peick, Nand Kochhar, and Mark Sampson chat about how companies can address growing co... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 02 Jun, 2023 - Comments: 0

AI predictions and announcements filled the news this week, including a statement from the Center for AI Safety that was signed by some top AI execs — including Sam Altman, CEO of OpenAI — warning that uncontrolled AI could end up smarter than us and lead to our extinction. Foxconn estimates its artificial intelligence server revenue will double this year with the popularity of generative A... » read more

What Is Zonal Architecture? And Why Is it Upending the Automotive Supply Chain?
By Paul McLellan - 01 Jun, 2023 - Comments: 0

Over the last few years, the basic architecture of how a vehicle is put together has changed a lot. This has also resulted in a change in how the automotive supply chain is put together, too. The traditional ECU-based architecture and the automobile supply chain Historically, vehicles have been put together like the picture on the left in the above diagram. Vehicles could have as many a... » read more

How Many Sensors For Autonomous Driving?
By John Koon - 01 Jun, 2023 - Comments: 0

With the cost of sensors ranging from $15 to $1,000, carmakers are beginning to question how many sensors are needed for vehicles to be fully autonomous at least part of the time. Those sensors are used to collect data about the surrounding environment, and they include image, lidar, radar, ultrasonic, and thermal sensors. One type of sensor is not sufficient, because each has its limitation... » read more

Blog Review: May 31
By Jesse Allen - 31 May, 2023 - Comments: 0

Cadence's Moshik Rubin looks at how the Portable Test and Stimulus Standard (PSS) is finding new use cases in ATE production test by enabling creation of a rich set of functional test scenarios in a reusable way. Synopsys' LJ Chen and Dana Neustadter check out the latest version of the Universal Flash Storage (UFS) standard, which doubles the data transfer rate of the preceding UFS 3.1 solut... » read more

Software-Defined Hardware Architectures
By Brian Bailey - 31 May, 2023 - Comments: 0

Hardware/software co-design has been a goal for several decades, but success has been limited. More recently, progress has been made in optimizing a processor as well as the addition of accelerators for a given software workload. While those two techniques can produce incredible gains, it is not enough. With increasing demands being placed on all types of processing, single-processor solutio... » read more

Week In Review: Design, Low Power
By Karen Heyman - 26 May, 2023 - Comments: 0

Cadence bought Pulsic, a U.K.-based developer of place-and-route tools for custom digital and analog. The acquisition follows a previous acquisition attempt by a Chinese firm in August 2022, which was blocked by the U.K. government. At the G7 Summit in Japan, IBM announced a 10-year, $100 million initiative with the University of Tokyo and the University of Chicago to develop a quantum-centr... » read more

Chiplet Planning Kicks Into High Gear
By Ann Mutschler - 25 May, 2023 - Comments: 0

Chiplets are beginning to impact chip design, even though they are not yet mainstream and no commercial marketplace exists for this kind of hardened IP. There are ongoing discussions about silicon lifecycle management, the best way to characterize and connect these devices, and how to deal with such issues as uneven aging and thermal mismatch. In addition, a big effort is underway to improve... » read more

IP Becoming More Complex, More Costly
By Brian Bailey - 25 May, 2023 - Comments: 0

Success in the semiconductor intellectual property (IP) market requires more than a good bit of RTL. New advances mandate a complete design, implementation, and verification team, which limits the number of companies competing in this market. What constitutes an IP block has changed significantly since the concept was first introduced in the 1990s. What was initially just a piece of RTL (reg... » read more

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