Designing for Data Flow


Movement and management of data inside and outside of chips is becoming a central theme for a growing number of electronic systems, and a huge challenge for all of them. Entirely new architectures and techniques are being developed to reduce the movement of data and to accomplish more per compute cycle, and to speed the transfer of data between various components on a chip and between chips ... » read more

Design IP


Cadence is a leader in semiconductor IP addressing hyperscale computing, enterprise, data center, automotive, and artificial intelligence/machine learning (AI/ML) applications. Our IP are available in advanced-process nodes ranging from 28nm to 3nm—all silicon verified in leading-edge foundry processes. Our memory IP portfolio spans DDR, LPDDR, and GDDR. The Cadence® IP family for PCI Expres... » read more

Blog Review: March 1


Siemens EDA's Chris Spear explains the UVM Factory and how it can facilitate collaboration by enabling injection of new features without affecting your team. Cadence's Paul McLellan looks at efforts to ensure chiplets from different companies work together, particularly when the creating companies didn't pre-plan for those specific chiplets to work together, as well as the problems of failur... » read more

How To Build Resilience Into Chips


Disaggregating chips into specialized processors, memories, and architectures is becoming necessary for continued improvements in performance and power, but it's also contributing to unusual and often unpredictable errors in hardware that are extremely difficult to find. The sources of those errors can include anything from timing errors in a particular sequence, to gaps in bonds between chi... » read more

Taming Corner Explosion In Complex Chips


There is a tenuous balance between the number of corners a design team must consider, the cost of analysis, and the margins they insert to deal with them, but that tradeoff is becoming a lot more difficult. If too many corners of a chip are explored, it might never see production. If not enough corners are explored, it could reduce yield. And if too much margin is added, the device may not be c... » read more

Leveraging Chip Data To Improve Productivity


The semiconductor ecosystem is scrambling to use data more effectively in order to increase the productivity of design teams, improve yield in the fab, and ultimately increase reliability of systems in the field. Data collection, analysis, and utilization is at the center of all these efforts and more. Data can be collected at every point in the design-through-manufacturing flow and into the f... » read more

How To Make Chiplets A Viable Market


At the recent Chiplet Summit, there was a panel session on the last afternoon titled "How to Make Chiplets a Viable Market." The panel was moderated by Meta's Ravi Agarwal, and the panelists were (from left to right in the photo): Travis Lanier of Ventana Micro Systems...actually Travis couldn't make it and Ventana was represented by Charles, but I didn't catch his last name Clint Walk... » read more

Dealing With Performance Bottlenecks In SoCs


A surge in the amount of data that SoCs need to process is bogging down performance, and while the processors themselves can handle that influx, memory and communication bandwidth are straining. The question now is what can be done about it. The gap between memory and CPU bandwidth — the so-called memory wall — is well documented and definitely not a new problem. But it has not gone away... » read more

Blog Review: Feb. 22


Siemens EDA's Harry Foster observes that the FPGA market continues to go through a similar complexity curve that the IC/ASIC market experienced in the early and mid-2000 timeframe. Synopsys' Mitch Heins explores the benefits of heterogeneous integration of lasers and active gain elements in a silicon-based photonic IC, including reduced system costs, size, weight, and power along with improv... » read more

Week In Review: Design, Low Power


It’s earnings season. Arm, Cadence, Synopsys, Siemens (consolidated), Rambus, and Renesas reported quarterly results over the past couple weeks. All posted year-over-year revenue growth, despite an overall challenging macroeconomic climate. A roundup of all the chip industry earnings reports from the past several weeks can be found here. The edge computing market is projected to jump to al... » read more

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