tag: Calypto

Do Circuits Whisper Or Shout?
By Ann Mutschler - 18 Nov, 2015 - Comments: 0

Maximizing SoC performance and minimizing power is becoming a multi-layered and multi-company challenge that depends on everything from ecosystem feedback and interactions to micro-architectural decisions about whether analog circuits whisper or shout. What used to be a straightforward architectural tradeoff between performance and power has evolved into a much more diffuse and collaborativ... » read more

One Flow To Rule Them All
By Brian Bailey - 12 Nov, 2015 - Comments: 0

The new mantra of shift left within EDA is nothing new and first made an appearance more than a decade ago. At that time there was a very large divide between logic synthesis and place and route. As wire delays became more important, timing closure became increasingly difficult with a logic synthesis flow that did not take that into account. The tools subsequently became tied much closer togeth... » read more

ARM Buys Carbon
By Brian Bailey - 20 Oct, 2015 - Comments: 3

ARM acquired Carbon Design Systems and its staff for an undisclosed amount of money, adding virtual prototyping capabilities for ARM cores. The deal is the latest in an onslaught of mergers and acquisitions that have racked the semiconductor industry over the past 18 months, propelled by low interest rates and relatively low valuations of target companies. For ARM, this deal solves a growing... » read more

Abstraction: Necessary But Evil
By Brian Bailey - 14 Oct, 2015 - Comments: 1

Abstraction allows aspects of a design to be described in an executable form much earlier in the flow. But some abstractions are breaking down, and an increasing amount of lower-level information has to be brought upstream in order to provide estimates that are close enough to reality so informed decisions can be made. The value of abstractions in design cannot be overstated. High levels of ... » read more

Power Estimation: Early Warning System Or False Alarm?
By Brian Bailey - 02 Oct, 2015 - Comments: 0

Semiconductor Engineering sat down with a large panel of experts to discuss the state of power estimation and to find out if the current levels of accuracy are sufficient to being able to make informed decisions. Panelists included: Leah Schuth, director of technical marketing in the physical design group at [getentity id="22186" comment="ARM"]; Vic Kularni, senior vice president and general ma... » read more

ROI Not There Yet For SysML
By Ann Mutschler - 24 Sep, 2015 - Comments: 3

At some point down the road in the realm of system-level design, the Systems Modeling Language (SysML) dialect of the Unified Modeling Language (UML) standard may drive into semiconductor design. So far, however, a return on investment has not been established for its use. SysML is defined as a general-purpose visual modeling language for systems engineering applications, and it supports the... » read more

Power Estimation: Early Warning System Or False Alarm?
By Brian Bailey - 22 Sep, 2015 - Comments: 0

Semiconductor Engineering sat down with a large panel of experts to discuss the state of power estimation and to find out if the current levels of accuracy are sufficient to being able to make informed decisions. Panelists included: Leah Schuth, director of technical marketing in the physical design group at [getentity id="22186" comment="ARM"]; Vic Kulkarni, senior vice president and general m... » read more

The Week In Review: Design/IoT
By Jesse Allen - 18 Sep, 2015 - Comments: 0

M&A Mentor Graphics acquired the rest of Calypto. In 2011, Mentor sold Calypto their high-level synthesis solution – Catapult – in exchange for 51% of the company, but left it as a fully standalone entity. Calypto will now be merged into Mentor as a standalone business unit. Tools Synopsys released its HAPS-80 FPGA-based prototyping system. According to Synopsys, the system pro... » read more

Mentor Buys Remainder Of Calypto
By Brian Bailey - 17 Sep, 2015 - Comments: 0

Back in 2002, a small startup company decided to tackle one of the most difficult problems in EDA—one that, if solved, could have opened up a whole new level of abstraction. Back when [getkc id="29" kc_name="logic synthesis"] was the new tool to try out, it suffered from the fact that gate-level [getkc id="11" kc_name="simulation"] had to be performed on the output, even if the input had been... » read more

A Strategy For Designing For Power With FinFETs
By Anand Iyer - 11 Sep, 2015 - Comments: 0

Recently Qualcomm announced their new SnapDragon processor 820, which was designed using finFET technology. They showed some amazing results, such as 2X improvement in performance and 2X improvement in power compared to 28nm designs. Previously, when ARM announced their A72 processors in finFET, they too had claimed 3.5X improvement in power compared to 28nm designs. But can designers expect... » read more

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