Week In Review: Design, Low Power

By Jesse Allen - 17 May, 2019 - Comments: 0

Tools & IP Cadence introduced the Tensilica Vision Q7 DSP, which provides up to 1.82 TOPS and is specifically optimized for simultaneous localization and mapping (SLAM). The DSP has a very long instruction word (VLIW) SIMD architecture, an enhanced instruction set supporting 8/16/32-bit data types and optional VFPU support for single and half precision, and a number of iDMA enhancements in... » read more

Week in Review: IoT, Security, Auto

By Jeff Dorsch - 01 Feb, 2019 - Comments: 0

Internet of Things Pepper IoT collaborated with the Dark Cubed cybersecurity firm to produce “The State of IoT Security Report,” which can be downloaded here. Pepper IoT is an Internet of Things platform and service provider. Key findings of the report: Device security is important, but the platform is much more critical; patching will not fix systemic problems; and the market must make se... » read more

The Week In Review: Design

By Jesse Allen - 04 May, 2018 - Comments: 0

M&A ANSYS finalized its acquisition of OPTIS. Founded in 1989, OPTIS provided software for scientific simulation of light, human vision and physics-based visualization. The acquisition boosts the company's automotive simulation portfolio with radar, lidar and camera simulation. Terms were not disclosed. IP Arm debuted the Cortex-M35P processor. Aimed at IoT applications, the IP combine... » read more

The Week In Review: Design

By Jesse Allen - 09 Mar, 2018 - Comments: 0

M&A Microchip inked an agreement to acquire Microsemi, provider of chips for defense and aerospace, for $68.78 per share in cash. The acquisition price represents a total equity value of about $8.35 billion and a total enterprise value of about $10.15 billion, according to Microchip. The deal is expected to close in the second quarter of 2018. Silvaco acquired NanGate. Founded in 2004, ... » read more

Knowledge Centers
Entities, people and technologies explored

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

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Week In Review: Design, Low Power

Week in Review: IoT, Security, Auto

The Week In Review: Design

The Week In Review: Design

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Entities, people and technologies explored