Week In Review: Semiconductor Manufacturing, Test

By Karen Heyman - 10 Feb, 2023 - Comments: 0

Chips for consumer devices are down, but the overall chip industry is actively preparing for the next phase of growth. Worldwide silicon wafer shipments, which are an aggregate view of all the various semiconductor segments, hit an all-time high in 2022, increasing 4% to 14,713 million square inches (MSI). Wafer revenue, meanwhile, rose 9.5% to $13.8 billion over the same period, SEMI reported ... » read more

DRAM’s Persistent Threat To Chip Security

By Bryon Moyer - 10 Feb, 2021 - Comments: 0

A well-known DRAM vulnerability called "rowhammer," which allows an assailant to disrupt or take control of a system, continues to haunt the chip industry. Solutions have been tried, and new ones are being proposed, but the potential for a major attack persists. First discovered some five years ago, most of the efforts to eliminate the "rowhammer" threat have done little more than mitigate t... » read more

Power/Performance Bits: Jan. 22

By Jesse Allen - 22 Jan, 2019 - Comments: 0

Efficient neural net training Researchers from the University of California San Diego and Adesto Technologies teamed up to improve neural network training efficiency with new hardware and algorithms that allow computation to be performed in memory. The team used an energy-efficient spiking neural network for implementing unsupervised learning in hardware. Spiking neural networks more closel... » read more

Toward Neuromorphic Designs

By Katherine Derbyshire - 25 Oct, 2017 - Comments: 1

Part one of this series considered the mechanisms of learning and memory in biological brains. Each neuron has many fibers, which connect to adjacent neurons at synapses. The concentration of ions such as potassium and calcium inside the cell is different from the concentration outside. The cellular membrane thus serves as a capacitor. When a stimulus is received, the neuron releases neur... » read more

New Memories And Architectures Ahead

By Brian Bailey - 13 Feb, 2017 - Comments: 4

Memory dominates many SoCs, and it is rare to hear that a design contains too much memory. However, memories consume a significant percentage of system power, and while this may not be a critical problem for many systems, it is a bigger issue for Internet of Things ([getkc id="76" kc_name="IoT"]) edge devices where total energy consumption is very important. Memory demands are changing in al... » read more

Sorting Out Next-Gen Memory

By Mark LaPedus - 22 Sep, 2016 - Comments: 8

In the data center and related environments, high-end systems are struggling to keep pace with the growing demands in data processing. There are several bottlenecks in these systems, but one segment that continues to receive an inordinate amount of attention, if not part of the blame, is the memory and storage hierarchy. [getkc id="92" kc_name="SRAM"], the first tier of this hierarchy, is... » read more

Drill Down: Embedded NVM Technology

By Ernest Worthman - 02 Apr, 2015 - Comments: 0

Many of the next-generation devices that will be seen on the IoT/E will have power, footprint, and electronic constraints as never before. Electronic flash memories (eFLASH), and their derivatives are seen as a realistic solution to many of these design constraints for small form factor and simple IoE devices. “NVM will be very important for the IoE from the perspective of saving power," ... » read more

Power/Performance Bits: March 10

By Jesse Allen - 10 Mar, 2015 - Comments: 0

Simulated memories Resistance-switching cells hold promise as a faster, higher capacity, lower power replacement for current non-volatile memory. Yet "the mechanisms that govern their remarkable properties have been poorly understood, limiting our ability to assess the ultimate performance and potential for commercialization," said Alejandro Strachan, professor of materials engineering at Pu... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

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