Manufacturing Bits: Feb. 25


Intel joins DSA consortium Arkema, ASML, Intel and others have formed a new consortium in the emerging directed self-assembly (DSA) arena.The group, dubbed PLACYD, is a European funded consortium. Part of the Seventh Framework European Programme (FP7) and funded by ENIAC JU (European Technology Platform for Nanoelectronics), the project includes Arkema, CEA-Leti, STMicroelectronics, Intel,... » read more

Week In Review: Manufacturing, Design, Test


Reports have surfaced that IBM’s semiconductor unit is on the block, and there has been discussion about the reasons and the aftermath. Sources say there are at least two potential buyers for the unit—Samsung and TowerJazz. Apparently, the talks between IBM-Samsung and IBM-TowerJazz have been going on for some time. Multiple sources believe that Samsung is interested in buying IBM’s advan... » read more

Manufacturing Bits: Feb. 11


Monolithic 3D SRAM project A group of companies have started a research project to propel the development of monolithic 3D chip technology. The research project, called COMPOSE³, involves the ability to stack transistors vertically. Within three years, the group hopes to unveil a proof of concept for building the world’s first 14nm, 3D-stacked SRAM cell based on III-V materials. Co... » read more

DSA, Multi-beam Make Steady Progress


Semiconductor Engineering sat down to discuss current and future lithography challenges with Laurent Pain, lithography lab manager at CEA-Leti. What follows are excerpts of that conversation. SE: CEA-Leti has two major programs in lithography. One is in directed self-assembly (DSA) and the other is in multi-beam e-beam. Let’s start with multi-beam. What is Leti doing in multi-beam and what... » read more

Leti Outlines FDSOI And Monolithic 3D IC Roadmaps


Semiconductor Engineering discussed the future roadmaps for fully depleted silicon-on-insulator (FDSOI) technology and monolithic 3D chips with Maud Vinet, manager for the Innovative Devices Laboratory at CEA-Leti. SE: What are some of the technologies being developed at the Innovative Devices Laboratory? Vinet: The Innovative Devices Laboratory is involved with advanced CMOS. So basically... » read more

Tunnel FETs Emerge In Scaling Race


Traditional CMOS scaling will continue for the foreseeable future, possibly to the 5nm node and perhaps beyond, according to many chipmakers. In fact, chipmakers already are plotting out a path toward the 5nm node, but needless to say, the industry faces a multitude of challenges along the road. Presently, the leading transistor candidates for 5nm are the usual suspects—III-V finFETs; gate... » read more

Momentum Builds For Monolithic 3D ICs


The 2.5D/3D chip market is heating up on several fronts. On one front, stacked-die using through-silicon vias (TSVs) is taking root. In a separate area, Samsung is sampling the world’s first 3D NAND device, with Micron and SK Hynix expected to follow suit. And now, there is another technology generating steam—monolithic 3D integrated circuits. In stacked-die, bare die are connected using... » read more

Week In Review: Manufacturing & Design


Don’t look now, but Intel is expanding its foundry business. Previously, Intel garnered a small collection of foundry customers. But Intel would not entertain foundry customers that had competitive products based on ARM chips. Apparently, Intel is having a change of heart. “I think they’ve changed their position,” said Nathan Brookwood, a research fellow at Insight 64. “They will do A... » read more

The Week In Review: Sept. 30


In a deal that could shake-up the fab tool landscape, Applied Materials has announced a definitive agreement to acquire rival Tokyo Electron Ltd. (TEL) in a stock deal valued at around $9.3 billion. The Fraunhofer Institute for Solar Energy Systems ISE, Soitec, CEA-Leti and the Helmholtz Center Berlin jointly announced having achieved a new world record for the conversion of sunlight into e... » read more

450mm: Out Of Sync


By Mark LaPedus The IC industry has been talking about it for ages, but vendors are finally coming to terms with a monumental shift in the business. The vast changes involve a pending and critical juncture, where the 450mm wafer size transition, new device architectures and other technologies will likely converge at or near the same time. In one possible scenario, 450mm fabs are projected ... » read more

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