Inevitable Bugs

By Brian Bailey - 29 Apr, 2020 - Comments: 3

Are bug escapes inevitable? That was the fundamental question that Oski Technology recently put to a group of industry experts. The participants are primarily simulation experts who, in many cases, help direct the verification directions for some of the largest systems companies. In order to promote free discussion, all comments have been anonymized, distilling the primary thoughts of the parti... » read more

More Data, More Processing, More Chips

By Ed Sperling - 07 Oct, 2019 - Comments: 0

Simon Segars, CEO of Arm, sat down with Semiconductor Engineering to talk about the impact of heterogeneous computing and new packaging approaches on IP, the need for more security, and how 5G and the edge will impact compute architectures and the chip industry. SE: There are a whole bunch of new markets opening up. How does Arm plan to tackle those? Segars: Luckily for us, we can design ... » read more

Another Brick Or Two In The Chip Design Wall

By Ed Sperling - 12 Sep, 2019 - Comments: 1

Physical challenges come and go in the semiconductor world. But increasingly, they also stick around, showing up in inconvenient places at the worst time. The chip industry has confronted and solved some massive challenges over the years. There was the 1 micron lithography wall, which was supposed to be impenetrable. That was followed by the 193nm litho challenge, which cost many billions of... » read more

Breaking Down The AI Memory Wall

By Steven Woo - 12 Sep, 2019 - Comments: 0

Over the past few decades, the semiconductor industry has witnessed the rapid evolution of memory technology as new memories helped to usher in new usage models that characterized each decade. For example, synchronous memory helped drive the personal computer (PC) revolution in the 1990s, and this was quickly followed by specialized graphics memory (GPUs) for game consoles in the 2000s. When sm... » read more

Blog Review: Aug. 28

By Jesse Allen - 28 Aug, 2019 - Comments: 0

Cadence's Paul McLellan takes a look at the numerous challenges in designing and manufacturing Cerebras' massive 400,000 processor, 1.2 trillion transistor chip. Synopsys' Taylor Armerding points to a lack of robust mobile app security and why building in security from the beginning can lead to greater productivity and cost saving. Mentor's Paul Johnston takes a look at what's in store at... » read more

Power/Performance Bits: May 8

By Jesse Allen - 08 May, 2018 - Comments: 0

Cobalt-free cathodes Researchers at the University of California, Berkeley, built lithium-ion battery cathodes without cobalt that can store 50% more energy than traditional cobalt-containing cathodes. Currently, lithium-ion battery cathodes use layered structures, which cobalt is necessary to maintain. When lithium ions move from the cathode to anode during charging, a lot of space is left... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.

by Ed Sperling

Defining The Chiplet Socket

The industry may have started with the wrong approach for enabling a third-party chiplet ecosystem, but who will step in and fix it?

by Brian Bailey

tag: Cerebras

Inevitable Bugs

More Data, More Processing, More Chips

Another Brick Or Two In The Chip Design Wall

Breaking Down The AI Memory Wall

Blog Review: Aug. 28

Power/Performance Bits: May 8

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