Single Vs. Multi-Patterning EUV

By Mark LaPedus - 25 Mar, 2019 - Comments: 5

Extreme ultraviolet (EUV) lithography finally is moving into production, but foundry customers now must decide whether to implement their designs using EUV-based single patterning at 7nm, or whether to wait and instead deploy EUV multiple patterning at 5nm. Each patterning scheme has unique challenges, making that decision more difficult than it might appear. Targeted for 7nm, single pattern... » read more

Mixed Outlook For Semi Biz

By Mark LaPedus - 25 Jul, 2018 - Comments: 0

Both the IC and fab equipment industries have been enjoying a boom cycle for some time, but they could be facing speed bumps and possibly turbulence in the second half of this year and into 2019. In the first half of 2018, the industry was fueled by the momentum carried over from 2017. DRAM prices remained relatively high, which contributed to the revenue growth in the overall IC industry. M... » read more

Will Fab Tool Boom Cycle Last?

By Mark LaPedus - 18 Dec, 2017 - Comments: 2

Fab equipment spending is on pace for a record year in 2017, and it now appears that momentum could continue into 2018. Fab tool vendors found themselves in the midst of an unexpected boom cycle in 2017, thanks to enormous demand for equipment in [getkc id="208" comment="3D NAND"] and, to a lesser degree, [getkc id="93" kc_name="DRAM"]. In the logic/foundry business, however, equipment deman... » read more

OSAT Biz: Growth And Challenges

By Mark LaPedus - 08 Feb, 2017 - Comments: 0

Amid a challenging business environment, the outsourced semiconductor assembly and test (OSAT) industry is projected to see steady to strong growth in a number of packaging segments this year. Right now, the [getkc id="83" kc_name="OSATs"]—which provide third-party IC-packaging and test services—are seeing brisk demand for both legacy and advanced chip packages. In addition, IDMs continu... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: CLSA

Single Vs. Multi-Patterning EUV

Mixed Outlook For Semi Biz

Will Fab Tool Boom Cycle Last?

OSAT Biz: Growth And Challenges