tag: Codasip

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 17 Mar, 2023 - Comments: 0

North Americas’s first zero-emission hydrogen-powered “Train de Charlevoix” will start running in Canada this summer, with speeds up to 85 mph, only emitting water vapor. Germany rolled out the world’s first passenger train fleet in 2022. The U.S. Department of Energy announced the availability of $750 million for R&D to further clean hydrogen technologies, part of the Biparti... » read more

Week In Review: Design, Low Power
By Jesse Allen - 17 Mar, 2023 - Comments: 0

The UK government published its National Quantum Strategy, which outlines the plan to invest £2.5 billion (~$3.0 billion) over the next 10 years into quantum technology, including computing, sensing, timing, imaging, and networking. "We will develop UK strengths across different hardware platforms, software, and components, and reinforce our capabilities throughout the supply chains. Although ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 10 Mar, 2023 - Comments: 0

Arm is expected to list solely on a U.S. stock exchange when it goes public again later this year, forgoing the London Stock Exchange for now, the BBC reports. Global investment banks expect the offering to value the company between $30 billion and $70 billion, according to Bloomberg. Disaggregating chips into specialized processors, memories, and architectures is becoming necessary for cont... » read more

What Makes RISC-V Verification Unique?
By Brian Bailey - 09 Mar, 2023 - Comments: 0

Semiconductor Engineering sat down to discuss the verification of RISC-V processors with Pete Hardee, group director for product management at Cadence; Mike Eftimakis, vice president for strategy and ecosystem at Codasip; Simon Davidmann, founder and CEO of Imperas Software; Sven Beyer, program manager for processor verification at Siemens EDA; Kiran Vittal, senior director of alliances partner... » read more

Designing for Data Flow
By Marie C. Baca - 02 Mar, 2023 - Comments: 0

Movement and management of data inside and outside of chips is becoming a central theme for a growing number of electronic systems, and a huge challenge for all of them. Entirely new architectures and techniques are being developed to reduce the movement of data and to accomplish more per compute cycle, and to speed the transfer of data between various components on a chip and between chips ... » read more

Dealing With Performance Bottlenecks In SoCs
By Brian Bailey - 23 Feb, 2023 - Comments: 0

A surge in the amount of data that SoCs need to process is bogging down performance, and while the processors themselves can handle that influx, memory and communication bandwidth are straining. The question now is what can be done about it. The gap between memory and CPU bandwidth — the so-called memory wall — is well documented and definitely not a new problem. But it has not gone away... » read more

Make The Right Choices For Enhanced Security On RISC-V
By David Marsden - 23 Feb, 2023 - Comments: 0

Two things are certain to make their presence felt at Embedded World 2023: the growing presence of RISC-V and the importance of safety and security in any embedded system. The breadth of RISC-V applications is expanding rapidly from IoT, mobile devices, to high performance computing, automotive and more. Its adoption, along with RISC-V International memberships, is also expanding from start... » read more

Efficient Verification Of RISC-V Processors
By Codasip - 22 Feb, 2023 - Comments: 0

For some time, application-specific instruction processors (ASIPs) have been developed for specialized applications. These have required multi-disciplinary teams with sufficient expertise to develop the instruction set, microarchitecture, and software toolchain. Few companies have had the right combination of skills to develop ASIPs so relatively few have been developed. With the advent of R... » read more

Is RISC-V Ready For Supercomputing?
By Brian Bailey - 09 Feb, 2023 - Comments: 0

RISC-V processors, which until several years ago were considered auxiliary processors for specific functions, appear to be garnering support for an entirely different type of role — high-performance computing. This is still at the discussion stage. Questions remain about the software ecosystem, or whether the chips, boards, and systems are reliable enough. And there are both business and t... » read more

5 Takeaways From The RISC-V Summit
By Lauranne Choquin - 26 Jan, 2023 - Comments: 0

After an intense week at the 2022 RISC-V Summit in San Jose, California, I am fueled with energy and positive thoughts. I had plenty of time to reflect on the event, which was unique in many ways. A lot happened in a few days for us at Codasip as well as for the wider RISC-V community, and here are 5 things I will remember from this conference. 1. RISC-V is inevitable If you have read our a... » read more

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