Week In Review: Design, Low Power

No dual listing for Arm; ultra-low power wireless; characterizing power amplifiers.


Arm is expected to list solely on a U.S. stock exchange when it goes public again later this year, forgoing the London Stock Exchange for now, the BBC reports. Global investment banks expect the offering to value the company between $30 billion and $70 billion, according to Bloomberg.

Disaggregating chips into specialized processors, memories, and architectures is becoming necessary for continued improvements in performance and power, but it’s also contributing to unusual and often unpredictable errors in hardware that are extremely difficult to find.

Products & IP

Infineon Technologies debuted an ultra-low power, dual-band Wi-Fi 5 and Bluetooth combo that provides up to a 65% reduction in power usage during “deep sleep” to extend battery life for applications such as smart locks, smart wearables, IP cameras, and thermostats. Infineon also introduced a single-chip solution that integrates a USB-C PD controller, a buck-boost battery charge controller, high voltage protection circuitry, and a microcontroller for battery-powered applications, including power tools, personal care products, smart home appliances, and other portable devices. Additionally, select Infineon microcontrollers now support the Rust programming language, with built-in support for memory-safe software development for mission-critical automotive software.

A surge in the amount of data that SoCs need to process is bogging down performance, and while the processors themselves can handle that influx, memory and communication bandwidth are straining. And the gap between memory and CPU bandwidth is continuing to get worse.

Keysight Technologies introduced a new Iterative Learning Control (ILC) test method to shorten Digital Pre-Distortion (DPD) test times for power amplifiers. It reduces characterization times by removing the limitations of signal analyzer and generator in determining real-world performance.

The verification of a processor is a lot more complex than a comparably-sized ASIC, and RISC-V processors take this to another layer of complexity.

CAST debuted a digital audio transceiver IP core that provides both Inter-IC Sound (I2S) and Time-Division Multiplexed (TDM) interfaces.

Defacto Technologies updated its SoC integration platform to improve joint handling of RTL and IP-XACT.

Fraunhofer IPMS debuted a Media Access Control Security (MACsec) IP core for securing Ethernet connections.

Tiempo Secure uncorked Secure Element IP based on a RISC-V microcontroller as well as a development kit.

BrainChip introduced the second generation of its neuromorphic AI platform for edge and AIoT devices.

Hailo uncorked a family of high-performance vision processors, designed for integration directly into intelligent cameras for video processing and analytics at the edge.

sureCore launched a range of off-the-shelf, ultra-low power memory IP in a variety of nodes for designs such as wearables, hearables, edge AI, and IoT.


After a restructuring period, Austin-based Mythic, an AI processor company with analog compute-in-memory technology, raised $13 million and appointed a new CEO Dave Fick, who previously served as CTO.

Infineon secured capacity from UMC for manufacturing automotive microcontrollers containing eNVM on a 40nm process. “Going forward, Infineon and UMC will further deepen the automotive collaboration in the areas of microcontroller, power management and connectivity solutions,” said Rutger Wijburg, chief operating officer of Infineon.

The cost of borrowing is going up, but investors continued to pour money into the chip industry in February. Collectively, 132 companies raised more than $4.5 billion last month.

Renesas Electronics and Tata Consultancy Services are teaming up to establish a design center that will collaborate on radio frequency, digital and mixed-signal design, and software development for next generation semiconductor solutions for IoT, smart cities, industrial, and automotive segments.

Blueshift Memory is using Codasip Studio tools to integrate RISC-V processor IP into an FPGA-based design for memory architecture, modifying the Codasip core to maximize memory bandwidth.

Renesas used Cadence’s Verisium AI-Driven Verification Platform for root cause analysis of bugs in its R-Car designs for automotive applications.

Sondrel extended its license agreement with Synopsys for three more years, which includes including architecture, design, test, and verification tools for nodes down to 5nm.

Research notes

Researchers from Nagoya Institute of Technology, University of Nottingham, and ROMA TRE University designed metasurfaces to create waveform-based selectivity in antennas. “Classic antennas are incapable of varying their performance, for example, its radiation pattern, at a fixed frequency. In our study, we introduced a new degree of freedom to change antenna performance and control electromagnetic waves/signals even at the same frequency by using ‘metasurfaces,’ artificially engineered electromagnetic structures that can produce electromagnetic properties based on the signal received. In particular, our metasurfaces show unique behavior that selectively transmits incoming signals in response to their pulse width, which is applied to the antenna design,” said Hiroki Wakatsuchi of NITech.

Keysight Technologies, RISE Research Institutes of Sweden, KTH Royal Institute of Technology, and Riga Technical University demonstrated 310 GBaud rates using on-off keying modulation and 160 GBaud rates using PAM6 modulation with direct detection system to support 1.6 Tbps applications. By using a low latency intensity modulation and direct detection (IM/DD) system with the highest baud rate possible, the team could increase the amount of information the system can transmit by reducing the number of wavelengths required to achieve 800 Gbps and 1.6 Tbps capacities. Additionally, Keysight and McGill University were able to achieve 1.2 Tbps and 1.6 Tbps O-band coherent transmissions operating over 10 km using distributed feedback lasers (DFBs) for both the carrier and local oscillator.

Ansys will contribute $250,000 in grants to academic institutions that integrate its simulation tools into undergraduate curricula in new and innovative ways. The first call for submissions is open through March 31 with priority given to proposals that span multiple courses in a department and include simulation in at least one first- or second-year course. The second call will open later this year and focus on undergraduate engineering courses that cover sustainability or electronics topics.

Upcoming events

  • International Symposium on Physical Design (ISPD), March 26 – 29
  • MEMCon 2023, March 28 – 29
  • SNUG Silicon Valley, March 29 – 30

Further reading

Check out the latest Low Power-High Performance and Systems & Design newsletters for these highlights and more:

  • Special Report — Taming Corner Explosion In Complex Chips
  • Leveraging Data To Improve Productivity
  • Dealing With Performance Bottlenecks In SoCs
  • Will AI Take My Job?
  • Uneven Circuit Aging Becoming A Bigger Problem
  • What Makes RISC-V Verification Unique?
  • MIPI’s Focus Widens

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