tag: CPF

Optimizing IP For Power
By Ed Sperling - 11 Apr, 2013 - Comments: 0

By Ed Sperling As the amount of commercial IP in an SoC increases, the entire bill of materials is coming under increasing scrutiny because of a new concern—power. Commercial IP, after all, is largely a collection of black-box solutions to speed up the time it takes to bring a chip to market, and frequently to improve the quality, but the cumulative impact on the system power budget has neve... » read more

Dealing With The Data Glut
By Ann Mutschler - 11 Apr, 2013 - Comments: 0

By Ann Steffora Mutschler Tools like emulation and simulation are an absolute necessity to design and verify today’s complex SoCs, but what happens when you want to do power analysis and the file sizes are too massive for the emulator to handle? Even with an emulator a five-minute mobile phone call could take three months. Understandably, this issue is causing pain to many design teams... » read more

There Can Be Only One
By Synopsys - 14 Mar, 2013 - Comments: 0

By Cary Chin The tagline of the 1986 fantasy film “Highlander” implies that, at least in some instances, we eventually will arrive at a single, best solution for our problems. In the case of low-power design, the most obvious application of the phrase is in the standardization of low power intent formats, where the Unified Power Format (UPF) and the Common Power Format (CPF) have been lock... » read more

Experts At The Table: The Trouble With Low-Power Verification
By Ed Sperling - 14 Mar, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance Engineering sat down to discuss low-power verification with Leah Clark, associate technical director at Broadcom; Erich Marschner, product marketing manager at Mentor Graphics; Cary Chin, director of marketing for low-power solutions at Synopsys; and Venki Venkatesh, senior director of engineering at Atrenta. What follows are excerpts of that conversat... » read more

Unified Power Intent
By Ed Sperling - 01 Mar, 2013 - Comments: 0

The next version of the Unified Power Format has been approved, bridging the major differences between UPF/IEEE 1801 and the Common Power Format. For anyone who works in low-power verification, this is very good news. The new standard is the result of an unprecedented collaboration by chipmakers and EDA companies, and the people who devised a solution to this problem deserve a big pat on the... » read more

Experts At The Table: Obstacles In Low-Power Design
By Ed Sperling - 06 Dec, 2012 - Comments: 0

By Ed Sperling Low-Power/High-Performance Engineering sat down to discuss low-power design with with Leah Clark, associate technical director at Broadcom; Richard Trihy, director of design enablement at GlobalFoundries; Venki Venkatesh, engineering director at Atrenta; and Qi Wang, technical marketing group director at Cadence. What follows are excerpts of that conversation. LPHP: If you ar... » read more

Tech Talk: LP Design And Verification
By Ed Sperling - 06 Dec, 2012 - Comments: 0

Cadence's Qi Wang talks with Low-Power/High-Performance Engineering about power formats and what else can be done to save power in SoCs. [youtube vid=afJ6VQ0AYgg] » read more

Experts At The Table: Obstacles In Low-Power Design
By Ed Sperling - 06 Dec, 2012 - Comments: 0

By Ed Sperling Low-Power/High-Performance Engineering sat down to discuss low-power design with with Leah Clark, associate technical director at Broadcom; Richard Trihy, director of design enablement at GlobalFoundries; Venki Venkatesh, engineering director at Atrenta; and Qi Wang, technical marketing group director at Cadence. What follows are excerpts of that conversation. LPHP: If you ar... » read more

CPF 2.0 Voltage Regulator And Analog Ports
By Luke Lang - 08 Nov, 2012 - Comments: 0

By Luke Lang CPF 2.0 was released more than a year and half ago, yet the majority of the designs are still done with CPF 1.1. This is one of those good news/bad news situations. The good news is that CPF 1.1 is perfectly adequate for majority of the LP designs. The bad news is that designers may not be aware of the new CPF 2.0 features that could be quite useful. This month, we will take a loo... » read more

More Intelligent Standards
By Ed Sperling - 11 Oct, 2012 - Comments: 0

There is a lot of talk these days about holistic power intent. The terminology may sound new, but the underpinnings are not. This was the idea behind the Common Power Format, which was proposed by Cadence back in 2006, and the Unified Power Format (more recently known as IEEE 1801), which was introduced the following year. These ideas were forward-looking at the time. They grasped the growi... » read more

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