By Barry Pangrle
It’s often said that the wonderful thing about standards is that there are so many to choose from. As an industry, EDA seems to have a short memory as VMM and OVM (now becoming UVM), VHDL and Verilog, and more recently UPF and CPF. In cases where one standard suffices, it is horribly inefficient to create multiple “standards.” It is a waste of effort and resources for ED...
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