Accelerating Zero-Knowledge Proof Generation With Reconfigurable Hardware (KAIST)


Researchers from Korea Advanced Institute of Science and Technology (KAIST) have published “ZK-Flex: A Flexible and Scalable Framework for Accelerating Zero-Knowledge Proofs”. Abstract “Zero-knowledge proofs (ZKP) allows a prover to convince a verifier of computational correctness without revealing private data, ensuring both privacy and verifiability. However, proof generation i... » read more

Secure at First Silicon: Reducing Cost and Risk


Security weaknesses related to side-channel leakage are often discovered far too late in the lifecycle of a chip. Design teams may focus on functionality, performance, and power, assuming that a robust algorithm like AES is enough to guarantee security. Only after first silicon comes back – and an expert lab starts probing power traces or EM emissions – do they realize that sensitive inform... » read more

A GPU Microarchitecture Optimized for Fully Homomorphic Encryption


Researchers from Boston University, Northeastern University, KAIST, and University of Murcia, et al. have released “FHECore: Rethinking GPU Microarchitecture for Fully Homomorphic Encryption”. Abstract“Fully Homomorphic Encryption (FHE) enables computation directly on encrypted data but incurs massive computational and memory overheads, often exceeding plaintext execution by seve... » read more

Navigating FIPS 140-3


FIPS 140‑3 is a U.S. federal standard. Validations are issued under the Cryptographic Module Validation Program (CMVP), jointly managed by the National Institute of Standards (NIST) and the Canadian Center for Cyber Security (CCCS). These validations are accepted by both U.S. and Canadian federal agencies. The standard imposes strict requirements on security boundaries, operational environmen... » read more

Five Tips To Avoid Security Errors In Product Development


Riscure, now part of Keysight, has been helping chip vendors and device manufacturers improve the security of their products for years. The security scenario has changed a lot over time. The attacker profile evolved from individuals motivated by curiosity, with very limited resources and attack potential, to well-funded and organized adversaries with malicious motivations and the capacity to ex... » read more

The Evolution Of Hardware Root Of Trust Security IP


Navigate hardware-based security for semiconductors with this white paper about tRoot Hardware Secure Modules (HSMs). This paper provides security solutions for protecting digital assets in an increasingly interconnected world. Key Takeaways: Understand why robust security measures are needed for AI, IoT, and high-performance computing. Discover tRoot HSMs features, including secure ... » read more

Comprehensive Performance Study of Zero-Knowledge Proofs on GPUs (Univ. of Michigan)


A new technical paper titled "ZKProphet: Understanding Performance of Zero-Knowledge Proofs on GPUs" was published by researchers at University of Michigan. Abstract "Zero-Knowledge Proofs (ZKP) are protocols which construct cryptographic proofs to demonstrate knowledge of a secret input in a computation without revealing any information about the secret. ZKPs enable novel applications in p... » read more

In-SRAM Computing Architecture Tailored For Cryptographic Acceleration Within MCUs (UC Riverside)


A new technical paper titled "CryptoSRAM: Enabling High-Throughput Cryptography on MCUs via In-SRAM Computing" was published by researchers at University of California, Riverside. Abstract "Secure communication is a critical requirement for Internet of Things (IoT) devices, which are often based on Microcontroller Units (MCUs). Current cryptographic solutions, which rely on software librari... » read more

In-NAND Self-Encryption Architecture In A 4D-NAND Structure (DGIST, Georgia Tech Et Al.)


A new technical paper titled "FlashVault: Versatile In-NAND Self-Encryption with Zero Area Overhead" was published by researchers at DGIST, Georgia Tech, POSTECH, Samsung Electronics, Virginia Tech, and Korea University. Abstract "We present FlashVault, an in-NAND self-encryption architecture that embeds a reconfigurable cryptographic engine into the unused silicon area of a state-of-the-ar... » read more

PUFs In A Post-Quantum World


With the looming threat of quantum computing on the horizon, the security landscape is changing. Explore the emerging threat and its implications for current cryptographic standards. This white paper provides an in-depth analysis of quantum computing's impact on security and explains how PUF technology can help you maintain robust security in the quantum era. Why Read This? Quantum Comp... » read more

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