Power Semiconductors: A Deep Dive Into Materials, Manufacturing & Business

By The SE Staff - 03 Apr, 2023 - Comments: 0

Whether you’re the owner of the average smartphone, commuting on trains, or driving around in a Tesla, you use power semiconductor devices every day. In a technology-dependent world, these devices are everywhere, and demand for more types of chips using different materials is growing. In the past, most engineers paid little attention to power semiconductors. They were deemed commodity, off... » read more

Getting Smarter About Tool Maintenance

By Anne Meixner - 16 Mar, 2023 - Comments: 0

Chipmakers have begun to shift to predictive maintenance for process tools, but the hefty investment in analytics and engineering efforts means it will take some time for smart maintenance to become a widespread practice. Semiconductor manufacturers need to maintain a diverse set of equipment to process the flow of wafers, dies, packaged parts, and boards running through factories. OSAT and ... » read more

Metrology Strategies For 2nm Processes

By Laura Peters - 07 Mar, 2023 - Comments: 3

Metrology and wafer inspection processes are changing to keep up with evolving and new device applications. While fab floors still have plenty of OCD tools, ellipsometers, and CD-SEMs, new systems are taking on the increasingly 3D nature of structures and the new materials they incorporate. For instance, processes like hybrid bonding, 3D NAND flash devices, and nanosheet FETs are pushing the bo... » read more

New Wafer-Like And Reticle-Like Sensors Deliver Fast, Easy Measurements Inside The Process Chamber

By CyberOptics - 07 Mar, 2023 - Comments: 0

Setup and maintenance operations for semiconductor manufacturing tools can be tedious, time-consuming, and expensive, incurring both direct costs for personnel and resources and indirect costs for lost tool time during extended commissioning of new tools and requalification of repaired or serviced tools. Wafer-like (and reticle-like) sensors (WaferSense® from CyberOptics) provide fast, easy ac... » read more

Bump Reliability is Challenged By Latent Defects

By Karen Heyman - 07 Feb, 2023 - Comments: 0

Thermal stress is a well-known problem in advanced packaging, along with the challenges of mechanical stress. Both are exacerbated by heterogenous integration, which often requires mingling materials with incompatible coefficients of thermal expansion (CTE). Effects are already showing up and will likely only get worse as package densities increase beyond 1,000 bumps per chip. “You comb... » read more

Effect Of RF Plasma Process Gas Chemistry And Electrode Configuration On The Removal Of Copper Lead Frame Oxidation

By Daniel Chir - 07 Feb, 2023 - Comments: 0

By Daniel Chir and Johnson Toh Lead frame surface oxidation can lead to surface delamination after molding or wire bonding issues. The application of plasma treatment has been proven to be safe and effective solution to address these issues. However, the effectiveness of plasma treatment for removing oxide is dependent on the correct use of recipe parameters, gas chemistry and electrode conf... » read more

Metrology Options Increase As Device Needs Shift

By Laura Peters - 10 Jan, 2023 - Comments: 1

Semiconductor fabs are taking an ‘all hands on deck’ approach to solving tough metrology and yield management challenges, combining tools, processes, and other technologies as the chip industry transitions to nanosheet transistors on the front end and heterogenous integration on the back end. Optical and e-beam tools are being extended, while X-ray inspection is being added on a case-by-... » read more

Adopting Predictive Maintenance On Fab Tools

By Anne Meixner - 06 Dec, 2022 - Comments: 0

Predictive maintenance, based on more and better sensor data from semiconductor manufacturing equipment, can reduce downtime in the fab and ultimately cut costs compared with regularly scheduled maintenance. But implementing this approach is non-trivial, and it can be disruptive to well-honed processes and flows. Not performing maintenance quickly enough can result in damage to wafers or the... » read more

Legacy Tools, New Tricks: Optical 3D Inspection

By Karen Heyman - 08 Nov, 2022 - Comments: 0

Stacking chips is making it far more difficult to find existing and latent defects, and to check for things like die shift, leftover particles from other processes, co-planarity of bumps, and adhesion of different materials such as dielectrics. There are several main problems: Not everything is visible from a single angle, particularly when vertical structures are used; Various struc... » read more

Bump Height Uniformity And 3D Sensing

By Subodh Kulkarni - 08 Nov, 2022 - Comments: 0

Achieving 3D sensing for semiconductor bump height uniformity is essential before adding photoresist. But there are challenges in using traditional methods for measuring uniformity after copper plating, which requires a combination of 3D fringe projection technology and NanoResolution inspection and metrology. Here’s what we’ve learned in a bump height uniformity case study: » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?