Collaboration Accelerates Moore’s Law


Moore's Law dictates that the number of transistors in dense, integrated circuits will double approximately every two years. Maintaining this pace of scaling, however, has become increasingly difficult given the ever-increasing complexity inherent with new chip starts. Additionally, the cost of using leading-edge process technology is prohibitively expensive. As a result, collaboration amon... » read more

Improving Yield Of 2.5D Designs


While progress is being made on the packaging side of 2.5D design, more needs to be resolved when it comes to improving yields. Proponents of 2.5D present compelling benefits. Arif Rahman, a product architect at Altera, noted that the industry trend of silicon convergence is leading to multiple technologies being integrated into single-chip solutions. “2.5D/3D integration has multiple adva... » read more

Blog Review: March 26


Synopsys’ Eric Huang has discovered a video of Superman using a GoPro camera (scroll down to bottom of page). So this is what it’s like to stop bullets with your hand. Cadence’s Tom Hackett zeroes in on mobile interfaces in a video—SoC fabric, memory and chip-to-chip. Nice whiteboard drawing. Mentor’s Anil Khanna looks at a methodology for developing high-performance embedded so... » read more

Memory Architectures Undergo Changes


By Ed Sperling Memory architectures are taking some new twists. Fueled by multi-core and multiple processors, as well as some speed bumps using existing technology, SoC makers are beginning to rethink how to architect, model and assemble memory to improve speed, lower power and reduce cost. What’s unusual about all of this is that it doesn’t rely on new technology, although there certai... » read more

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