Choosing Verification Engines


Emulation, simulation, FPGA prototyping and formal verification have very specific uses on paper, but the lines are becoming less clear as complexity goes up, more third-party IP is included, and the number of use cases and interactions of connected devices explodes. Ironically, the lines are blurring not for the most complex SoCs, such as those used in smart phones. The bigger challenge app... » read more

The Trust Burning Debug Cycle From Hell


As bad as The Trust Burning Debug Cycle From Hell sounds, it’s worse than you think. Most of us don’t realize it exists. In my first 10 years as a hardware developer I wrote code like it could never exist! But then came the realization. It’s a cycle that preys on us all. It tempts me constantly. Most of us in hardware development are used to seeing bugs as annoyances at a minimum, thou... » read more

Hypervisors: Help Or Hindrance?


Hypervisors are seeing an increased level of adoption, but do they help or hinder the development and verification process? The answer may depend on your perspective. In the hardware world, system-level integration is rapidly becoming a roadblock in the development process. While each of the pieces may be known to work separately, as soon as they are put together, the interactions between th... » read more

The Rise Of Complex Debug On Heterogeneous Multicore SoCs


When projects move away from discrete development of loosely coupled systems to an integrated heterogeneous environment, elephantine debugging challenges are created. These challenges do not exist during discrete development because developers are able to design, develop, test, and optimize within the confines of their own device. But when consolidating heterogeneous systems, developers and ... » read more

FPGA Prototyping Gains Ground


FPGA technology for design prototypes is making new inroads as demands increase for better integration between hardware and software. [gettech id="31071" comment="FPGA"] prototyping, also known as physical prototyping, has been supported by all of the major EDA players for some time, and it has been considered an essential tool for the largest chipmakers, along with emulation and simulation.... » read more

Managing Quality With Developer Desktop Analysis


Even the most seasoned developer is prone to introducing a few new bugs in new or modified code. Static analysis is a great solution to help development teams find and fix those issues. Now with Coverity’s new desktop analysis capabilities, developers can find and fix their own defects before checking their code into the source control management system – and before anyone else finds the de... » read more

Optimizing Emulator Utilization


The growing pressures of market schedules, design complexity and the ever-increasing amount of embedded software in today’s SoCs has put verification in the hot-seat. Now that new emulation tools can link hardware and software verification, SoC designers are turning to emulation more than ever before to debug embedded software. The standard method for debugging software with an emulator is wi... » read more

Colorless vs. Colored Double-Patterning Design Flows


Colored vs. Colorless double patterning design flows—do you know which one is best for your design? What options does your foundry allow? Do you debug one differently from the other? In this short video, I’ll demonstrate the differences between colored and colorless DP design flows, and explain the options and potential pitfalls of each approach. With a better understanding of how to design... » read more

Sharing Information About Corner Cases


The definition of what is good enough when it comes to new technology is still evolving. In safety-critical applications, as well as a number of other areas such as drones or domestic robots, people will need to watch over all machines very closely rather than the other way around. While these machines may serve a useful purpose, they also need to be monitored to ensure they don't go too far as... » read more

Executive Insight: Raik Brinkmann


[getperson id="11306" comment="Raik Brinkmann"], president and CEO of [getentity id="22395" e_name="OneSpin Solutions"], sat down with Semiconductor Engineering to discuss where and why formal verification is gaining traction, and how it fits alongside other verification approaches. What follows are excerpts of that conversation. SE: [getkc id="33" kc_name="Formal"] has been around for a whi... » read more

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