tag: density

What’s Changing In DRAM
By Ed Sperling - 22 Jan, 2024 - Comments: 0

More data requires more processing and more storage, because that data needs to be stored somewhere. What’s changing is that it’s no longer just about SRAM and DRAM. Today, multiple types of DRAM are used in the same devices, each with its own set of tradeoffs. C.S. Lin, marketing executive at Winbond, talks about the potential problems that causes, including mismatches in latency, and high... » read more

Slower Metal Bogs Down SoC Performance
By Bryon Moyer - 15 Oct, 2020 - Comments: 0

Metal interconnect delays are rising, offsetting some of the gains from faster transistors at each successive process node. Older architectures were born in a time when compute time was the limiter. But with interconnects increasingly viewed as the limiter on advanced nodes, there’s an opportunity to rethink how we build systems-on-chips (SoCs). ”Interconnect delay is a fundamental tr... » read more

The Implementation Of Embedded In-Chip Sensing Fabrics In Today’s Cutting-Edge Technologies
By Moortec - 08 Jul, 2020 - Comments: 0

This whitepaper takes a comprehensive look at the implementation of Embedded Sensing Fabrics in today’s cutting-edge technologies and how this can benefit today’s advanced node semiconductor design engineers by improving the performance and reliability of SoC designs. With advances in CMOS technology, and the scaling of transistor channel lengths to nanometer (nm) dimensions, the density of... » read more

Increasing eFPGA Density
By Ed Sperling - 24 Jun, 2020 - Comments: 0

How to boost embedded FPGA density to the point where it is competitive with traditional FPGAs, at a lower cost and faster turnaround time. Geoff Tate, CEO of Flex Logix, talks about the importance of interconnects and standard cells in adding flexibility into chips, and why eFPGAs are suddenly gaining attention. » read more

High-Performance Memory For AI And HPC
By Ed Sperling - 09 Mar, 2020 - Comments: 0

Frank Ferro, senior director of product management at Rambus, examines the current performance bottlenecks in high-performance computing, drilling down into power and performance for different memory options, and explains what are the best solutions for different applications and why. » read more

In-Memory Computing
By Ed Sperling - 08 Aug, 2019 - Comments: 1

Gideon Intrater, CTO at Adesto Technologies, talks about why in-memory computing is now being taken seriously again, years after it was first proposed as a possible option. What's changed is an explosion in data, and a recognition that it's too time- and energy-intensive to send all of that data back and forth between memories and processors on the same chip, let alone to the cloud and back. On... » read more

Hybrid Memory
By Ed Sperling - 13 Sep, 2018 - Comments: 0

Gary Bronner, senior vice president of Rambus Labs, talks about the future of DRAM scaling, why one type of memory won’t solve all needs, and what the pros and cons are of different memories. https://youtu.be/R0hhDx2Fb7Q » read more

Tech Talk: eFPGA Density
By Ed Sperling - 01 Mar, 2018 - Comments: 0

Chen Wang, senior vice president of engineering at Flex Logix, talks about how to improve density in embedded FPGAs. https://youtu.be/Rk0oqzWQr8I » read more

The Implementation Of Embedded PVT Monitoring Subsystems In Today’s Cutting Edge Technologies
By Moortec - 13 Dec, 2017 - Comments: 0

This new whitepaper from Moortec takes a comprehensive look at the Implementation of Embedded PVT Monitoring Subsystems in Today’s Cutting Edge Technologies and how this can benefit today’s advanced node semiconductor design engineers by improving the performance and reliability of SoC designs. With advances in CMOS technology, and the scaling of transistor channel lengths to nanometer (nm)... » read more

Shift Left Your FPGA Design For Faster Time To Market
By Synopsys - 10 May, 2017 - Comments: 0

In just a few short years, FPGAs have become an integral part of system design for many applications either as a co-processor or the main system processor. As FPGA size and performance increases, system designers are able to utilize them for more tasks. The increased size and performance translates to greater complexity, which is further compounded as designers try to integrate more functionali... » read more

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