tag: EDA

Near-Threshold Computing Gets A Boost
By Brian Bailey - 25 Jul, 2022 - Comments: 0

Near-threshold computing has long been used for power-sensitive devices, but some surprising, unrelated advances are making it much easier to deploy. While near-threshold logic has been an essential technique for applications with the lowest power consumption, it always has been difficult to use. That is changing, and while it is unlikely to become a mainstream technique, it is certainly bec... » read more

Data Management Evolves
By Ann Mutschler - 19 Jul, 2022 - Comments: 0

Semiconductor Engineering sat down to discuss data management challenges with Jerome Toublanc, business development executive at Ansys; Kam Kittrell, vice president of product management in the Digital & Signoff Group at Cadence; Simon Rance, vice president of marketing at Cliosoft; Rob Conant, vice president of software and ecosystem at Infineon Technologies; and Michael Munsey, senior dir... » read more

Customization, Heterogenous Integration, And Brute Force Verification
By Ed Sperling - 14 Jul, 2022 - Comments: 0

Semiconductor Engineering sat down to discuss why new approaches are required for heterogeneous designs, with Bari Biswas, senior vice president for the Silicon Realization Group at Synopsys; John Lee, general manager and vice president of the Ansys Semiconductor business unit; Michael Jackson, corporate vice president for R&D at Cadence; Prashant Varshney, head of product for Microsoft Azu... » read more

What Future Processors Will Look Like
By Ed Sperling - 13 Jul, 2022 - Comments: 0

Mark Papermaster, CTO at AMD, sat down with Semiconductor Engineering to talk about architectural changes that are required as the benefits of scaling decrease, including chiplets, new standards for heterogeneous integration, and different types of memory. What follows are excerpts of that conversation. SE: What does a processor look like in five years? Is it a bunch of chips in a package? I... » read more

Risks Rise As Robotic Surgery Goes Mainstream
By John Koon - 30 Jun, 2022 - Comments: 1

As robotic-assisted surgery moves into the mainstream, so do concerns about security breaches, latency, and system performance. In the operating room, every second is critical, and technology failures or delays can be life-threatening. Robotic-assisted surgery (RAS) has around for a couple decades, but it is becoming more prevalent and significantly more complex. The technology often include... » read more

EDA Gaps At The Leading Edge
By Ed Sperling - 29 Jun, 2022 - Comments: 1

Semiconductor Engineering sat down to discuss why new approaches are required for heterogeneous designs, with Bari Biswas, senior vice president for the Silicon Realization Group at Synopsys; John Lee, general manager and vice president of the Ansys Semiconductor business unit; Michael Jackson, corporate vice president for R&D at Cadence; Prashant Varshney, head of product for Microsoft Azu... » read more

Toward Democratized IC Design And Customized Computing
By Jason Cong - 28 Jun, 2022 - Comments: 0

Integrated circuit (IC) design is often considered a “black art,” restricted to only those with advanced degrees or years of training in electrical engineering. Given that the semiconductor industry is struggling to expand its workforce, IC design must be rendered more accessible. The benefit of customized computing General-purpose computers are widely used, but their performance improv... » read more

A New Breed Of EDA Required
By Brian Bailey - 23 Jun, 2022 - Comments: 1

While doing research for one of my stories this month, a couple of people basically said that applying methodologies of the past to the designs of today can be problematic because there are fundamental differences in the architectures and workloads. While I completely agree, I don't think these statements go far enough. Designs of today generally have one of everything — one CPU, one accel... » read more

EDA Embraces Big Data Amid Talent Crunch
By Marie C. Baca - 23 Jun, 2022 - Comments: 0

The semiconductor industry’s labor crunch finally has convinced chip designers to bet big money on big data. As recently as 2016, executives weren’t sure there was a market for big data approaches to electronic design automation. The following year, utilization of big data remained stuck in its infancy. And in 2018, Semiconductor Engineering questioned why the EDA sector wasn’t investi... » read more

Coverage-Directed Test Selection Method for Automatic Test Biasing During Simulation-Based Verification
By Technical Paper Link - 22 Jun, 2022 - Comments: 0

New research paper titled "Supervised Learning for Coverage-Directed Test Selection in Simulation-Based Verification" from researchers at University of Bristol and Infineon Technologies. Abstract: "Constrained random test generation is one the most widely adopted methods for generating stimuli for simulation-based verification. Randomness leads to test diversity, but tests tend to repeate... » read more

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