Math And Electronic Design Automation

By Frank Schirrmeister - 23 Apr, 2020 - Comments: 0

Even though our teenage children may not show it the proper appreciation (yet), math is often referred to as the "universal language." And it is, even in EDA. Whenever I’m asked what the heck I do in my day job, I often fall back on analogies—a lot of them refer to building houses. For the geekier ones among us, I have even invoked The Hitchhiker's Guide to the Galaxy's Slartibartfast to ex... » read more

Tracking Automotive’s Rapidly Shifting Ecosystem

By Ann Mutschler - 02 Apr, 2020 - Comments: 0

The automotive ecosystem is becoming much harder to navigate as automakers, Tier 1s and IP vendors redefine their relationships based upon shifting value caused by an rapidly expanding amount of increasingly interdependent and complex electronic content. Predictions of massive change started almost a decade ago with a number of pilot programs around autonomous vehicles. But those shifts real... » read more

Making Sense Of EDA And Digital Twins

By Frank Schirrmeister - 26 Mar, 2020 - Comments: 0

There is a new buzzword in town, “digital twins.” I have been using it for a while now in the context of system-on-chip (SoC) verification as well as a little more broadly when it comes to security issues for data in general. There are some differences in emphasis across different vertical domains, based on when they are used during the life cycle, which use models are desired and what scop... » read more

Why It’s So Hard To Create New Processors

By Brian Bailey - 26 Mar, 2020 - Comments: 1

The introduction, and initial success, of the RISC-V processor ISA has reignited interest in the design of custom processors, but the industry is now grappling with how to verify them. The expertise and tools that were once in the market have been consolidated into the hands of the few companies that have been shipping processor chips or IP cores over the past 20 years. Verification of a pro... » read more

EDA In The Cloud

By Michael White - 26 Mar, 2020 - Comments: 0

Interest in the use of third-party public clouds in conjunction with electronic design automation (EDA) applications has never been higher. Back in February, Ed Sperling and I did a video interview (embedded below) to discuss EDA and cloud computing. This article follows up on that interview, providing some additional insight into why and how the integrated circuit (IC) industry reached this po... » read more

Do You Trust Your IP Supplier?

By Brian Bailey - 26 Mar, 2020 - Comments: 0

How much do you trust your IP supplier, regardless of whether IP was developed in-house or by a third-party provider? And what implications does it have a system integrator? These are important questions that many companies are beginning to ask. Today, there are few methods, other than documentation, that provide the necessary information. The software industry may be ahead of the hardware i... » read more

Power Management Becomes Top Issue Everywhere

By Ann Mutschler - 12 Mar, 2020 - Comments: 1

Power management is becoming a bigger challenge across a wide variety of applications, from consumer products such as televisions and set-top-boxes to large data centers, where the cost of cooling server racks to offset the impact of thermal dissipation can be enormous. Several years ago, low-power design was largely relegated to mobile devices that were dependent on a battery. Since then, i... » read more

A Complete System-Level Security Verification Methodology

By Cadence - 04 Mar, 2020 - Comments: 0

Hardware is at the root of all digital systems, and security must be considered during the system-on-chip (SoC) design and verification process. Verifying the security of an SoC design is challenging because of time to market pressure and resource constraints. Resources allocated to the already time-consuming task of functional verification must be diverted to security verification, which requi... » read more

Reducing Power At RTL

By Ann Mutschler - 13 Feb, 2020 - Comments: 0

Power management and reduction at the register transfer level is becoming more problematic as more heterogeneous elements are added into advanced designs and more components are dependent on interactions with other components. This has been a growing problem in leading-edge designs for the past couple of process nodes, but similar issues have begun creeping into less-sophisticated designs as... » read more

Brighter Future For Photonics

By Brian Bailey - 13 Feb, 2020 - Comments: 3

Photons increasingly are taking over where electrons are failing in communications, but mixing the two never has been easy. There always have been two potential implementation paths — building each on its own substrate and then stacking them, or building them on a single substrate. The tradeoff between the two solutions is more complex than it may initially appear, and ongoing improvements... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.