More Performance At The Edge


Shrinking features has been a relatively inexpensive way to improve performance and, at least for the past few decades, to lower power. While device scaling will continue all the way to 3nm and maybe even further, it will happen at a slower pace. Alongside of that scaling, though, there are different approaches on tap to ratchet up performance even with chips developed at older nodes. This i... » read more

New Roadmap For Electronics


Tech Talk: Melissa Grupen-Shemansky, CTO for SEMI’s FlexTech Group and Advanced Packaging program, looks at what’s changing now that Moore’s Law is slowing, and how packaging is changing as the traditional physical boundaries of electronics begin breaking down. https://youtu.be/UpH1m8Oru90 » read more

7nm Design Challenges


Ty Garibay, CTO at ArterisIP, talks about the challenges of moving to 7nm, who’s likely to head there, how long it will take to develop chips at that node, and why it will be so expensive. This also raises questions about whether chips will begin to disaggregate at 7nm and 5nm. https://youtu.be/ZqCAbH678GE » read more

Defining Edge Memory Requirements


Defining edge computing memory requirements is a growing problem for chipmakers vying for a piece of this market, because it varies by platform, by application, and even by use case. Edge computing plays a role in artificial intelligence, automotive, IoT, data centers, as well as wearables, and each has significantly different memory requirements. So it's important to have memory requirement... » read more

Blazing-Fast Performance


When it comes to raw performance, there's nothing like a supercomputer. Until recently, though, most of this was simply bragging rights about whose supercomputer was faster. A trillion calculations (petaflop), more or less, doesn't mean that much outside of scientific circles. What's changing is that companies and governments now can utilize these blazing fast machines across a wider swath o... » read more

Chip Dis-Integration


Just because something can be done does not always mean that it should be done. One segment of the semiconductor industry is learning the hard way that continued chip integration has a significant downside. At the same time, another another group has just started to see the benefits of consolidating functionality onto a single substrate. Companies that have been following Moore's Law and hav... » read more

System-Level Power Modeling Takes Root


Power, heat, and their combined effects on aging and reliability, are becoming increasingly critical variables in the design of chips that will be used across a variety of new and existing markets. As more processing moves to edge, where sensors are generating a tsunami of data, there are a number of factors that need to be considered in designs. On one side, power budgets need to reflect th... » read more

Preparing For An IoT Edge Project


Before starting your IoT edge device development process, it is wise to spend time preparing for your new project. Planning before you start will limit frustration and save you time and money in the long run. Before diving into the task, study the 15 preparation considerations in this white paper. To read more, click here. » read more

Embedded FPGA: Increasing Security In Next-Gen Networks


The pull of data toward real-time applications on the network’s edge makes the outflow of processing from the cloud inevitable. Programmable logic provides the ability to make computing much more data-centric. While traditional processors demand data to be fed to their pipelines through a complex hierarchy of memory caches, programmable logic makes it possible to construct data pipelines. Dat... » read more

Imperfect Silicon, Near-Perfect Security


Some chipmakers, under pressure to add security to rapidly growing numbers of IoT devices, have rediscovered a "fingerprinting" technique used primarily as an anti-counterfeiting measure. [getkc id="227" kc_name="Physically unclonable functions"] (PUFs) are used to assign a unique identification number based on inconsistencies in the speed with which current causes a series of logic gates to... » read more

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