Specialization Vs. Generalization In Processors

Academia has been looking at specialization for many years, but solutions were rejected because general-purpose solutions were advancing fast enough to keep up with most application requirements. That is no longer the case. The introduction and support of the RISC-V processor architecture has attracted a lot of attention, but whether that is the right direction for the majority of modern comput... » read more

Leveraging Large Language Models (LLMs) To Perform SW-HW Co-Design

A technical paper titled “On the Viability of using LLMs for SW/HW Co-Design: An Example in Designing CiM DNN Accelerators” was published by researchers at University of Notre Dame. Abstract: "Deep Neural Networks (DNNs) have demonstrated impressive performance across a wide range of tasks. However, deploying DNNs on edge devices poses significant challenges due to stringent power and com... » read more

Review of Tools & Techniques for DL Edge Inference

A new technical paper titled "Efficient Acceleration of Deep Learning Inference on Resource-Constrained Edge Devices: A Review" was published in "Proceedings of the IEEE" by researchers at University of Missouri and Texas Tech University. Abstract: Successful integration of deep neural networks (DNNs) or deep learning (DL) has resulted in breakthroughs in many areas. However, deploying thes... » read more

Using Silicon Photonics To Reduce Latency On Edge Devices

A new technical paper titled "Delocalized photonic deep learning on the internet’s edge" was published by researchers at MIT and Nokia Corporation. “Every time you want to run a neural network, you have to run the program, and how fast you can run the program depends on how fast you can pipe the program in from memory. Our pipe is massive — it corresponds to sending a full feature-leng... » read more

Training a ML model On An Intelligent Edge Device Using Less Than 256KB Memory

A new technical paper titled "On-Device Training Under 256KB Memory" was published by researchers at MIT and MIT-IBM Watson AI Lab. “Our study enables IoT devices to not only perform inference but also continuously update the AI models to newly collected data, paving the way for lifelong on-device learning. The low resource utilization makes deep learning more accessible and can have a bro... » read more

64-Bit RISC-V Microprocessor Delivers New Options For IoT Edge Development

Global and rapidly expanding IoT edge devices are becoming increasingly important for connecting various sensors to the cloud via networks. IoT edge devices are progressively integrating 64-bit microprocessors capable of running Linux and similar high-performance operating systems. Moreover, recent import and export regulation changes have produced a need for choices in CPU architecture for mic... » read more

Implementations of 2D Material-Based Devices For IoT Security

A new research paper titled "Application of 2D Materials in Hardware Security for Internet-of-Things: Progress and Perspective" was published by researchers at National University of Singapore and A*STAR. The paper explores the "implementation of hardware security using 2D materials, for example, true random number generators (TRNGs), physical unclonable functions (PUFs), camouflage, and ant... » read more

Novel In-Pixel-in-Memory (P2M) Paradigm for Edge Intelligence (USC)

A new technical paper titled "A processing-in-pixel-in-memory paradigm for resource-constrained TinyML applications" was published by researchers at University of Southern California (USC). According to the paper, "we propose a novel Processing-in-Pixel-in-memory (P2M) paradigm, that customizes the pixel array by adding support for analog multi-channel, multi-bit convolution, batch normaliza... » read more

Efficient Neuromorphic AI Chip: “NeuroRRAM”

New technical paper titled "A compute-in-memory chip based on resistive random-access memory" was published by a team of international researchers at Stanford, UCSD, University of Pittsburgh, University of Notre Dame and Tsinghua University. The paper's abstract states "by co-optimizing across all hierarchies of the design from algorithms and architecture to circuits and devices, we present ... » read more

Performing Edge Detection With Oscillatory Neural Networks as a Hetero-associative Memory

New research paper titled "Oscillatory Neural Network as Hetero-Associative Memory for Image Edge Detection" from LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier. Abstract "The increasing amount of data to be processed on edge devices, such as cameras, has motivated Artificial Intelligence (AI) integration at the edge. Typical image processing me... » read more

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