Chip Architectures Becoming Much More Complex With Chiplets

By Ed Sperling and Ann Mutschler - 30 Jan, 2025 - Comments: 0

The migration from monolithic SoCs to chiplet-based designs is creating a confusing array of options and tradeoffs for design teams working at the leading edge, and the number of choices is only going to increase as third-party chiplets begin pouring into the market. That hasn't dampened the appetite for chiplets, however, which are deemed essential for future generations of semiconductors f... » read more

AI Infrastructure At A Crossroads

By Ramin Farjadrad - 30 Jan, 2025 - Comments: 0

By Ramin Farjadrad and Syrus Ziai There is a big push to achieve greater scale, performance and sustainability to fuel the AI revolution. More speed, more memory bandwidth, less power — these are the holy grails. Naturally, the one-two punch of StarGate and DeepSeek last week has raised many questions in our ecosystem and with our various stakeholders. Can DeepSeek be real? And if so, w... » read more

Chiplets Still A Challenge With UCIe 2.0

By Brian Bailey - 30 Jan, 2025 - Comments: 0

Plug-and-play chiplets are a popular goal, but does UCIe 2.0 move us any closer to that becoming a reality? The problem is that the current drivers of the standard are not after interoperability in the way that plug-and-play requires. Released in August 2024, UCIe 2.0 touts higher bandwidth density and improved power efficiency, as well as new features supporting 3D packaging, a manageable s... » read more

AI Won’t Replace Subject Matter Experts

By Adam Kovac - 15 Jan, 2025 - Comments: 0

Experts at The Table: The emergence of LLMs and other forms of AI has sent ripples through a number of industries, raising fears that many jobs could be on the chopping block, to be replaced by automation. Whether that’s the case in semiconductors, where machine learning has become an integral part of the design process, remains to be seen. Semiconductor Engineering sat down with a panel of e... » read more

Chiplet Interconnects Add Power And Signal Integrity Issues

By Adam Kovac - 12 Dec, 2024 - Comments: 0

The flexibility and scalability offered by chiplets make them an increasingly attractive choice over planar SoCs, but the rollout of increasingly heterogeneous assemblies adds a variety of new challenges around the processing and movement of data. Nearly all of the chiplets in use today were designed in-house by large systems companies and IDMs. Going forward, third-party chiplets will begin... » read more

Top-Down Vs. Bottom-Up Chiplet Design

By Ann Mutschler - 26 Nov, 2024 - Comments: 0

Chiplets are gaining widespread attention across the semiconductor industry, but for this approach to really take off commercially it will require more standards, better modeling technologies and methodologies, and a hefty amount of investment and experimentation. The case for chiplets is well understood. They can speed up time to market with consistent results, at whatever process node work... » read more

How AI Is Transforming System Design

By Adam Kovac - 26 Nov, 2024 - Comments: 0

Experts At The Table: ChatGPT and other LLMs have attracted most of the attention in recent years, but other forms of AI have long been incorporated into design workflows. The technology has become so common that many designers may not even realize it’s a part of the tools they use every day. But its adoption is spreading deeper into tools and methodologies. Semiconductor Engineering sat down... » read more

Chip Industry Week In Review

By The SE Staff - 22 Nov, 2024 - Comments: 0

SK hynix started mass production of 1-terabit 321-high NAND, with availability scheduled for the first half of next year. Rapidus will receive an additional ¥200 billion yen ($1.28B) from the Japanese government beginning in fiscal year 2025, reports Nikkei. This is on top of ¥920 billion yen ($5.98B) Rapidus has already received from the government in support of its goal to reach commer... » read more

Chiplets Make Progress Using Interconnects As Glue

By Ann Mutschler - 31 Oct, 2024 - Comments: 0

Breaking up SoCs into their component parts and putting those and other pieces together in some type of heterogeneous assembly is beginning to take shape, fueled by advances in interconnects, complex partitioning, and industry learnings about what works and what doesn't. While the vision of plug-and-play remains intact, getting there is a lot more complicated than initially imagined. It can ... » read more

UMI: Extending Chiplet Interconnect Standards To Deal With The Memory Wall

By Ramin Farjadrad - 14 Oct, 2024 - Comments: 0

With the Open Compute Project (OCP) Summit upon us, it’s an appropriate time to talk about chiplet interconnect (in fact the 2024 OCP Summit has a whole day dedicated to the multi-die topic, on October 17). Of particular interest is the Bunch of Wires (BoW) interconnect specification that continues to evolve. At OCP there will be an update and working group looking at version 2.1 of BoW. (... » read more

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