Electronics For Quantum Communications


Our secure digital communications so far have functioned on the principle of key-based encryption. This involves generating a key of appropriate length, which is then used to encrypt the data. Because distributing the keys is difficult, the keys are reused rather than regularly generating new ones. The regular use of the keys opens up the encryption process to attacks by mathematical methods... » read more

eFPGAs Vs. FPGA Chiplets


Embedded FPGAs are a totally different concept from discrete FPGA chiplets, and that is reflected in size, cost, power and performance. Geoff Tate, CEO of Flex Logix, talks about which applications are best for each, how each maximizes power and performance, and why choices will vary greatly by application. Related eFPGA Knowledge Center FPGA Knowledge Center Increasing EFPGA Densit... » read more

New Design For Trusted Data


Recently, I wrote about Fully Homomorphic Encryption (FHE from now on) which I think is going to be something big that you will hear lots about in the future. Here's the reason I think it is going to be big. The people who care the most about security, such as financial institutions, governments, and companies with huge amounts of valuable data (such as semiconductor companies, or social m... » read more

Power/Performance Bits: Feb. 25


Thinner, flexible touchscreens Researchers from RMIT University, University of New South Wales, and Monash University developed a thin, flexible electronic material for touchscreens. The material is 100 times thinner than current touchscreen materials. The new screens are still based on indium-tin oxide (ITO), a common touchscreen material. However, a liquid metal printing approach was used... » read more

Power/Performance Bits: Jan. 21


Two-layer MRAM Scientists at Tokyo Institute of Technology propose a simpler MRAM construction that could perform faster with less power than conventional memories. The idea relies on unidirectional spin Hall magnetoresistance (USMR), a spin-related phenomenon that could be used to develop MRAM cells with an extremely simple structure. The spin Hall effect leads to the accumulation of elect... » read more

Uses And Limitations Of AI In Chip Design


Raik Brinkmann, president and CEO of OneSpin Solutions, sat down with Semiconductor Engineering to talk about AI changes and challenges, new opportunities for using existing technology to improve AI, and vice versa. What follows are excerpts of that conversation. SE: What's changing in AI? Brinkmann: There are a couple of big changes underway. One involves AI in functional safety, where y... » read more

Bolstering Security For AI Applications


Hardware accelerators that run sophisticated artificial intelligence (AI) and machine learning (ML) algorithms have become increasingly prevalent in data centers and endpoint devices. As such, protecting sensitive and lucrative data running on AI hardware from a range of threats is now a priority for many companies. Indeed, a determined attacker can either manipulate or steal training data, inf... » read more

Security Tradeoffs In A Shifting Global Supply Chain


Experts at the Table: Semiconductor Engineering sat down to discuss a wide range of hardware security issues and possible solutions with Norman Chang, chief technologist for the Semiconductor Business Unit at ANSYS; Helena Handschuh, fellow at Rambus, and Mike Borza, principal security technologist at Synopsys. What follows are excerpts of that conversation. The first part of this discussion ca... » read more

Why Data Is So Difficult To Protect In AI Chips


Experts at the Table: Semiconductor Engineering sat down to discuss a wide range of hardware security issues and possible solutions with Norman Chang, chief technologist for the Semiconductor Business Unit at ANSYS; Helena Handschuh, fellow at Rambus, and Mike Borza, principal security technologist at Synopsys. What follows are excerpts of that conversation. The first part of this discussion ca... » read more

IP Security In FPGAs


Quinn Jacobson, strategic architect at Achronix, talks about security in FPGAs, including how to prevent reverse engineering of IP, how to make sure the design is authentic, and how to limit access to IP in transit and in the chip. » read more

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