tag: errors

Analysis of the Errors of High-Fidelity Two-Qubit Gates in Silicon Quantum Dots (UNSW et al.)
By Technical Paper Link - 28 Aug, 2024 - Comments: 0

A new technical paper titled "Assessment of the errors of high-fidelity two-qubit gates in silicon quantum dots" was published by researchers at UNSW, Diraq, Sandia National Laboratories, Keio University, Leibniz-Institut für Kristallzüchtung and others. Abstract "Achieving high-fidelity entangling operations between qubits consistently is essential for the performance of multi-qubit syst... » read more

State of the Art And Future Directions of Rowhammer (ETH Zurich)
By Technical Paper Link - 18 Apr, 2023 - Comments: 0

A new technical paper titled "Fundamentally Understanding and Solving RowHammer" was published by researchers at ETH Zurich. Abstract "We provide an overview of recent developments and future directions in the RowHammer vulnerability that plagues modern DRAM (Dynamic Random Memory Access) chips, which are used in almost all computing systems as main memory. RowHammer is the phenomenon in... » read more

Enterprise-Class DRAM Reliability
By Ed Sperling - 06 Mar, 2020 - Comments: 0

Brett Murdock, product manager for memory interfaces at Synopsys, examines demand for DDR5 and DDR4 in both on-premise and cloud implementations, what features are available for which versions, how they affect performance and power, how ECC is implemented, and how the data moves throughout these systems. » read more

Balancing Flexibility And Quality In SRAM Verification
By Elven Huang - 30 Jan, 2020 - Comments: 0

Memory is an essential component of system-on-chip (SOC) designs, especially at advanced nodes. SoCs use a variety of memory block types, such as static random-access memory (SRAM) and dynamic RAM (DRAM), to perform computations. The SRAM blocks, which consist of an assembly of specialized calls that abut or overlap one another in a specific arrangement that complies with the circuit specificat... » read more

Memory Model Verification at the Trisection of Software, Hardware, and ISA (Princeton)
By Technical Paper Link - 18 Apr, 2017 - Comments: 0

Source: Princeton University, Caroline Trippel, Yatin A. Manerkar, Daniel Lustig*, Michael Pellauer*, Margaret Martonosi *NVIDIA Princeton University researchers have discovered a series of errors in the RISC-V instruction specification that now are leading to changes in the new system, which seeks to facilitate open-source design for computer chips. In testing a technique they created for... » read more

Modeling Errors
By Ed Sperling - 28 Feb, 2013 - Comments: 0

Raising the abstraction level in increasingly large and complex design requires proxies. In IC world, we think of them in terms of higher abstractions, but the basic premise is that you can’t focus on ever detail without losing sight of the bigger picture, so we build models that can represent those details. Done well, these models are incredibly useful. They save time, make it easier to ... » read more

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy