tag: ESDA

Steering The Semiconductor Industry
By Brian Bailey - 26 Aug, 2021 - Comments: 2

Progress in semiconductors has been one of the most successful engineering feats, and the industry has ridden an exponential curve longer than anything else in history. It is also a highly conservative industry that has pushed away many disruptive changes in favor of small incremental changes that minimize risk. There have been significant changes over the decades, and they often required a ... » read more

EDA, IP Revenue Up 15%
By Ed Sperling - 11 Jan, 2021 - Comments: 2

EDA and IP revenues blasted off in Q3 of 2020 in every geography and every sector, despite a trade war, a pandemic, and slowdowns in the automotive and avionics sectors. Revenue grew to $2.95 billion, up 15% over the $2.57 billion in the same period in 2019, according to a just-released report from the Electronic System Design Alliance Market Statistic Services (MSS). The four-quarter moving... » read more

ESD Requirements Are Changing
By Bryon Moyer - 11 Jun, 2020 - Comments: 1

Standards for specifying a chip’s ability to withstand electrostatic discharge (ESD) are changing – in some cases, getting tougher, and in others, easing up. ESD protection has been on a path from a one-size-fits-all approach to one where a signal’s usage helps to determine what kind of protection it should get. Protecting chips from ESD damage has been a longstanding part of IC design... » read more

Tuesday At DAC
By Brian Bailey - 21 Jun, 2017 - Comments: 0

Accellera got everyone out of bed early this morning to talk about the just announced early access release of Portable Stimulus. The panel was made up with people from user companies. Semiconductor Engineering will be providing full coverage of this event, but perhaps the important message is that the panelists were eager to get adoption within their companies but knew that there would be chall... » read more

2017: Tool And Methodology Shifts
By Brian Bailey - 26 Jan, 2017 - Comments: 0

As the markets for semiconductor products evolve, so do the tools that enable automation, optimization and verification. While tools rarely go away, they do bend like plants toward light. Today, it is no longer the mobile phone industry that is defining the direction, but automotive and the Internet of Things (IoT). Both of these markets have very different requirements and each creates their o... » read more

The Week In Review: Design
By Jesse Allen - 20 Jan, 2017 - Comments: 0

Legal Back in 2013, Synopsys filed suit against ATopTech for copyright infringement. The courts found in favor of Synopsys and ATopTech was damages were set at a little over $30M. With appeals unsuccessful, ATopTech announced that it has filed a voluntary petition under Chapter 11 of the Bankruptcy Code and has filed a motion to sell its businesses using a stalking horse bidder (an initial b... » read more

The Week In Review: Design
By Jesse Allen - 23 Dec, 2016 - Comments: 0

M&A ARM reached further into the HPC space with its acquisition of Allinea Software, a provider of debug and performance analysis tools for HPC systems. Currently, 80% of the world's top 25 supercomputers use Allinea's tools, and ARM will continue supporting multiple processor architectures. Terms of the deal were not disclosed. PLDA Group is spinning out its QuickPlay C/C++ tool for ... » read more

The Week In Review: Design
By Jesse Allen - 30 Sep, 2016 - Comments: 0

Numbers EDA and IP sales increased 5.6% in Q2 to $2.013 billion, up from $1.907 billion in the same period in 2015, according to the most recent Electronic System Design Alliance numbers. Asia/Pacific revenue increased 10.9% to $608.1 million; Japan increased 15.7% to $211.4 million. The Americas increased 4.4% to $908.4 million. IP Cadence launched the latest generation of its Xtensa ... » read more

The Week In Review: Design
By Jesse Allen - 27 May, 2016 - Comments: 0

Mergers & Acquisitions Synopsys made a couple of announcements this week related to its TCAD business. First, they acquired Gold Standard Simulations, which clearly became a major factor in the release of a pre-wafer simulation solution to help semiconductor manufacturers reduce process node development time. The new solution aims to provide a comprehensive process, transistor and circui... » read more

The Week In Review: Design/IoT
By Jesse Allen - 01 Apr, 2016 - Comments: 0

Tools Synopsys unveiled a new custom design solution targeting FinFET layout, introducing visually-assisted routing automation, a built-in design rule checking engine, templates to apply previous layout decisions to new designs, and IC Compiler integration. TSMC certified the new tool for 10nm and 7nm FinFET process technologies. It has also been adopted by STMicroelectronics, GSI Technology... » read more

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