tag: ESL

Things You Never Knew About System Verilog
By Ed Sperling - 23 Oct, 2008 - Comments: 0

System Verilog is considered the current standard for a combined hardware description and verification language, and has been welcomed with open arms since it was approved by IEEE in 2005. Its usefulness in designing and verifying new chips is well known among those who work with it. The only problem is that many engineers still don’t know how to use more than a fraction of its capabilities�... » read more

Quality time?
By Ed Sperling - 08 Oct, 2008 - Comments: 0

By Ed Sperling System-Level Design sat down to discuss the future of verification with Olivier Haller, design verification team leader for STMicroelectronics’ functional verification group; Hillel Miller, functional design and verification tools and methodology manager at Freescale; Kelly Larson, design verification engineering manager at MediaTek Wireless; Adnan Hamid, CEO of Breker, and ... » read more

Cross-Talking with TLM 2.0
By Ed Sperling - 16 Sep, 2008 - Comments: 0

By Ed Sperling It’s almost like flying over the Great Plains of the United States. On the ground it’s hard to see above the corn stalks, but in an airplane you can see the entire horizon even if you can’t see those stalks anymore. The analogy is similar to where most of the major players in chip design say the engineering for systems on chips needs to go. With millions more gates avai... » read more

Object-Oriented Programming Is Back
By Ed Sperling - 16 Sep, 2008 - Comments: 0

Object-oriented programming is finally starting to look promising. For anyone who’s been following this technology, a statement like that is enough to evoke loud groans. Object-oriented programming, a.k.a. OOP, was first developed in the early 1960s. The goal was, and still is, to re-use components in software development—almost like Legos—by raising the level of abstraction for progra... » read more

New Challenges For Hardware Engineers
By Ed Sperling - 16 Sep, 2008 - Comments: 0

  It used to be fun to be a chip architect. You could wake up in the morning, grab a cup of strong black coffee and run through a few power and performance tradeoff calculations before deciding on the high-level architecture. That would set the engineering direction for months, if not years. On a good day, after introducing a steady infusion of caffeine into your bloodstream, you felt like ... » read more

Engineering Schools Trail Chip Design Changes
By Ed Sperling - 16 Sep, 2008 - Comments: 0

Complexity in designing chips is relatively well understood, even if it’s not easy to solve the problems and actually create the chips. But engineering schools are only beginning to grasp the enormity of the change, and their curricula are running years behind what is happening in the industry.   Corporations have spent years tearing down silos, and technology has forced the same kinds o... » read more

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