Week In Review: Auto, Security, Pervasive Computing

By Liz Allan - 04 Aug, 2023 - Comments: 0

Hyundai, Samsung Catalyst Fund, and others invested a combined $100 million in Canada-based Tenstorrent to accelerate the design and development of AI chiplets and machine-learning software and allow the integration of AI into future Hyundai, Kia, and Genesis vehicles, plus other future mobilities such as robotics and advanced air mobility (AAM). The National Highway Traffic Safety Administr... » read more

Analog Circuits Enabling Learning in Mixed-Signal Neuromorphic SNNs, With Tristate Stability and Weight Discretization Circuits

By Technical Paper Link - 02 Aug, 2023 - Comments: 0

A technical paper titled “Neuromorphic analog circuits for robust on-chip always-on learning in spiking neural networks” was published by researchers at University of Zurich and ETH Zurich. Abstract: "Mixed-signal neuromorphic systems represent a promising solution for solving extreme-edge computing tasks without relying on external computing resources. Their spiking neural network circui... » read more

Chip Industry’s Technical Paper Roundup: August 1

By Liz Allan - 01 Aug, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=39 /] More Reading Technical Paper Library home » read more

Implementing Fast Barriers For A Shared-Memory Cluster Of 1024 RISC-V Cores

By Technical Paper Link - 27 Jul, 2023 - Comments: 0

A technical paper titled “Fast Shared-Memory Barrier Synchronization for a 1024-Cores RISC-V Many-Core Cluster” was published by researchers at ETH Zürich and Università di Bologna. "Synchronization is likely the most critical performance killer in shared-memory parallel programs. With the rise of multi-core and many-core processors, the relative impact on performance and energy overhe... » read more

RISC-V Open Platform for Next-Gen Automotive ECUs (ETH Zurich, Huawei)

By Technical Paper Link - 27 Jul, 2023 - Comments: 0

A technical paper titled “Towards a RISC-V Open Platform for Next-generation Automotive ECUs” was published by researchers at ETH Zurich and Huawei Research Center (Italy). Abstract: "The complexity of automotive systems is increasing quickly due to the integration of novel functionalities such as assisted or autonomous driving. However, increasing complexity poses considerable challenges... » read more

Chip Industry’s Technical Paper Roundup: July 24

By Liz Allan - 24 Jul, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=119 /] More Reading Technical Paper Library home » read more

Week In Review: Auto, Security, Pervasive Computing

By Liz Allan - 21 Jul, 2023 - Comments: 0

The Biden-Harris Administration announced the U.S. Cyber Trust Mark, a cybersecurity certification and labeling program to help consumers choose smart devices less vulnerable to cyberattacks. The Federal Communications Commission (FCC) is applying to register the Cyber Trust Mark with the U.S. Patent and Trademark Office and it would appear on qualifying smart products, including refrigerators,... » read more

Analog On-Chip Learning Circuits In Mixed-Signal Neuromorphic SNNs

By Technical Paper Link - 20 Jul, 2023 - Comments: 0

A technical paper titled "Neuromorphic analog circuits for robust on-chip always-on learning in spiking neural networks" was published by researchers at Institute of Neuroinformatics, University of Zurich, and ETH Zurich. Abstract: "Mixed-signal neuromorphic systems represent a promising solution for solving extreme-edge computing tasks without relying on external computing resources. Their s... » read more

Chip Industry’s Technical Paper Roundup: July 18

By Liz Allan - 18 Jul, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=118 /] (more…) » read more

RowPress: Read-Disturb Phenomenon In DDR4 DRAM Chips

By Technical Paper Link - 15 Jul, 2023 - Comments: 0

A technical paper titled "RowPress: Amplifying Read Disturbance in Modern DRAM Chips" was published by researchers at ETH Zürich. Abstract: "Memory isolation is critical for system reliability, security, and safety. Unfortunately, read disturbance can break memory isolation in modern DRAM chips. For example, RowHammer is a well-studied read-disturb phenomenon where repeatedly opening and clo... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: ETH Zurich

Week In Review: Auto, Security, Pervasive Computing

Analog Circuits Enabling Learning in Mixed-Signal Neuromorphic SNNs, With Tristate Stability and Weight Discretization Circuits

Chip Industry’s Technical Paper Roundup: August 1

Implementing Fast Barriers For A Shared-Memory Cluster Of 1024 RISC-V Cores

RISC-V Open Platform for Next-Gen Automotive ECUs (ETH Zurich, Huawei)

Chip Industry’s Technical Paper Roundup: July 24

Week In Review: Auto, Security, Pervasive Computing

Analog On-Chip Learning Circuits In Mixed-Signal Neuromorphic SNNs

Chip Industry’s Technical Paper Roundup: July 18

RowPress: Read-Disturb Phenomenon In DDR4 DRAM Chips