Securing Chips During Manufacturing

By Ed Sperling - 07 Jul, 2016 - Comments: 0

David Lam, chairman of Multibeam, sat down with Semiconductor Engineering to talk about how next-gen lithography tools can be used to prevent cyber attacks and counterfeiting of hardware. SE: How did you get into the anti-counterfeiting business? Lam: About three years ago we were working with some customers that were troubled by the counterfeiting problem. We became aware of that sense o... » read more

The Road To 5nm

By Ed Sperling - 23 Jun, 2016 - Comments: 1

There is strong likelihood that enough companies will move to 7nm to warrant the investment. How many will move forward to 5nm is far less certain. Part of the reason for this uncertainty is big-company consolidation. There are simply fewer customers left who can afford to build chips at the most advanced nodes. Intel bought Altera. Avago bought Broadcom. NXP bought Freescale. GlobalFoundrie... » read more

The Evolving Thermal Landscape

By Ann Mutschler - 16 May, 2016 - Comments: 0

Managing heat in chips is becoming a precision balancing act at advanced nodes and with advanced packaging. While it's important to ensure that temperatures don't rise high enough to cause reliability problems, adding too much circuitry to control heat can reduce performance and lower energy efficiency. The most common approach to dealing with these issues is thermal simulation, which requir... » read more

Inside Advanced Packaging

By Mark LaPedus - 18 Feb, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss advanced IC-packaging, the OSAT industry, China and other topics with Ron Huemoeller, vice president of worldwide R&D at Amkor. What follows are excerpts of that conversation. SE: Where are we in advanced IC-packaging today? Huemoeller: We’ve hit the inflection point. Now we are coming to the other side of it. Regarding this need to int... » read more

Predictions For 2016: Semiconductors, Manufacturing And Design

By Brian Bailey - 21 Jan, 2016 - Comments: 0

Seventeen companies sent in their predictions for this year with some of them sending predictions from several people. This is in addition to the CEO predictions that were recently published. That is a fine crop of views for the coming year, especially since they know that they will be held accountable for their views and this year, just like the last, they will have to answer for them. We beli... » read more

Advanced Packaging Is Real. Now What?

By Ed Sperling - 14 Jan, 2016 - Comments: 0

For the past five years, it's been clear that 2.5D, fan-outs and other forms of system-in-package were on the horizon. Exactly when they would arrive no one knew. The most common prediction was that the timing would depend on when one of the big chipmakers decided to go down that route. The theory was that the remainder of the industry would follow, ecosystem issues would be sorted out—partic... » read more

Executive Insight: Sehat Sutardja

By Ed Sperling - 11 Jan, 2016 - Comments: 1

Sehat Sutardja, chairman and CEO of Marvell, sat down with Semiconductor Engineering to talk about new approaches for design and memory and why costs and time to market are forcing changes in Moore's Law. What follows are excerpts of that conversation. SE: What was behind your move into modular packaging? Sutardja: The cost of building chips is getting out of hand. As we make things more ... » read more

Fan-Out Packaging Gains Steam

By Mark LaPedus - 23 Nov, 2015 - Comments: 1

Fan-outs are creating a buzz and gaining steam in the market at a pace far beyond what anyone would have expected even at the start of the year. The approach, which has been around for several years, is a wafer-level packaging process that enables ultra-thin, high-density packages. So why the buzz? Apple is apparently moving to [getkc id="202" kc_name="fan-out"] packaging, according to an... » read more

Is The 2.5D Supply Chain Ready?

By Ed Sperling - 28 Sep, 2015 - Comments: 0

A handful of big semiconductor companies began taking the wraps off 2.5D and fan-out packaging plans in the past couple of weeks, setting the stage for the first major shift away from Moore's Law in 50 years. Those moves coincide with reports of commercial [getkc id="82" kc_name="2.5D"] chips from chip assemblers and foundries that are now under development. There have been indications for... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: fan-out