Novel Molded FCBGA Package Platform For Highly Reliable Automotive Applications

By InRak Kim - 19 Sep, 2024 - Comments: 0

The conventional flip chip ball grid array (FCBGA) package platform has wide industry usage and provides high electrical performance. However, as high performance requirements increased, it encounters significant challenges. FCBGA packages frequently encounter underfill cracks after long term reliability or harsh reliability test conditions for automotive devices. Figure 1 shows the typical und... » read more

Package Integrated Vapor Chamber Heat Spreaders

By Sanghyuk Kim - 21 Mar, 2024 - Comments: 0

With continuous increases in computational demand in nearly all electronics market segments, even historically lower power packaging is being driven into challenging thermal management situations. Node shrink alone is reaching a limit in maintaining track with Moore’s law. The economics and yield challenges of large monolithic system on chip (SoC) designs are driving the development of silico... » read more

Next Gen Laser Assisted Bonding (LAB) Technology

By SeokHo Na - 18 May, 2023 - Comments: 0

In the semiconductor market, there are many applications including smartphone, tablets, central processing units (CPUs), artificial intelligence (AI), data cloud and more that are expecting rapid growth. Among them, CPU data processing, AI and data cloud require much higher power consumption than smart phones or tablets. For the higher power applications, Flip Chip ball grid array (FCBGA) or 2.... » read more

How AiP/AoP Technology Helps Enable 5G And More

By Brendan Wells - 16 Feb, 2023 - Comments: 0

For 5G smartphones and other millimeter wave (mmWave) applications, antenna integration off the board and into the package, simplifies the design challenges endemic to high-frequency devices. These challenges include signal loss, signal integrity, and power supply limitation. Antenna in Package (AiP) and Antenna on Package (AoP) constructions provide the required form, fit and function for high... » read more

Fan-Out Packaging Gets Competitive

By Karen Heyman and Laura Peters - 18 Aug, 2022 - Comments: 0

Fan-out wafer-level packaging (FOWLP) is a key enabler in the industry shift from transistor scaling to system scaling and integration. The design fans out the chip interconnects through a redistribution layer instead of a substrate. Compared to flip-chip ball grid array (FCBGA) or wire bonds, it creates lower thermal resistance, a slimmer package, and potentially lower costs. Yet, if the h... » read more

The Race To Zero Defects In Auto ICs

By Anne Meixner - 07 Jun, 2022 - Comments: 0

Assembly houses are fine-tuning their methodologies and processes for automotive ICs, optimizing everything from inspection and metrology to data management in order to prevent escapes and reduce the number of costly returns. Today, assembly defects account for between 12% and 15% of semiconductor customer returns in the automotive chip market. As component counts in vehicles climb from the ... » read more

Challenges For Achieving Automotive Grade 1/0 Reliability In FCBGA and fcCSP Packages

By Knowlton Olmstead - 21 Apr, 2022 - Comments: 0

As the quantity, complexity, and functions of electronic devices in automobiles increase, understanding and characterizing package reliability is of significant concern and importance. The Automotive Electronics Council (AEC) Q-100 specification for Grade 1 and 0 reliability introduces unique challenges as thermal cycling (TC) and high temperature storage (HTS) requirements increase. Additional... » read more

Metal Thermal Interface Material For The Next Generation FCBGA

By Amkor - 19 Jan, 2022 - Comments: 0

Thermal interface materials (TIMs) have been widely adopted for improved thermal dissipation in flip chip ball grid array (FCBGA), flip chip lidded ball grid array (FCLGA) and flip chip pin grid array (FCPGA) packaging. As the next generation devices' requirements for power get even higher, enhanced thermal performance at the package level is increasingly important. A typical TIM applies a poly... » read more

Challenges And Approaches To Developing Automotive Grade 1/0 FCBGA Package Capability

By Amkor - 18 Nov, 2020 - Comments: 0

Automotive Grade 1 and 0 package requirements, defined by Automotive Electronics Council (AEC) Document AEC-100, require more severe temperature cycling and high temperature storage conditions to meet harsh automotive field requirements, such as a maximum 150°C device operating temperature, 15-year reliability and zero-defect quality level. Moreover, increased integration of device functionali... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?