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Challenges And Approaches To Developing Automotive Grade 1/0 FCBGA Package Capability

An update on flip chip ball grid array (FCBGA) package development as quality and reliability requirements increase for larger and larger package form factors and approaches that should be taken to meet Grade 1/0 requirements.

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Automotive Grade 1 and 0 package requirements, defined by Automotive Electronics Council (AEC) Document AEC-100, require more severe temperature cycling and high temperature storage conditions to meet harsh automotive field requirements, such as a maximum 150°C device operating temperature, 15-year reliability and zero-defect quality level. Moreover, increased integration of device functionality to meet the new automotive requirements for in-vehicle networking, autonomous driving, infotainment and sensor integration are driving increases in die and package sizes. This paper provides an update on flip chip ball grid array (FCBGA) package development as quality and reliability requirements increase for larger and larger package form factors and approaches that should be taken to meet Grade 1/0 requirements. Package quality and wear-out failure modes and mechanisms experienced during extended reliability testing in Automotive Grade 2 and 3 package qualifications have identified thermomechanical stress and material degradation at high temperatures as key factors for focus in Grade 1/0 development. To achieve higher grade levels, key package substrate materials such as core, solder resist and build-up layers need to be evaluated as well as assembly materials such as underfills materials may need improvement. Mechanical simulation data of key material properties such as coefficient of thermal expansion (CTE), modulus of elasticity (E1) and glass transition temperature (Tg) of the substrate and assembly materials are used to provide guidance for the selection of substrate and assembly materials used in the design of experiments to meet Auto Grade 1 and 0 reliability requirements. Taguchi mechanical simulations results show that use of low CTE materials for the substrate core and build up material was beneficial in preventing SR cracking, UF cracking and bump cracking. Reliability stress results on design of experiments based on inputs from simulation resulted in developing a substrate and assembly material set that meets AEC100 solder resist (SR) Grade 1 and 0 package requirements on a 45-mm x 45-mm FCBGA.

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