Formal’s Roadmap


Formal verification has come a long way in the past five years as it focused on narrow tasks within the verification flow. Semiconductor Engineering sat down to discuss that progress, and the future of formal technologies, with [getperson id="11306" comment="Raik Brinkmann"], president and CEO of [getentity id="22395" e_name="OneSpin Solutions"]; Harry Foster, chief verification scientist at [g... » read more

Formal’s Roadmap


Formal verification has come a long way in the past five years as it focused on narrow tasks within the verification flow. Semiconductor Engineering sat down to discuss that progress, and the future of formal technologies, with [getperson id="11306" comment="Raik Brinkmann"], president and CEO of [getentity id="22395" e_name="OneSpin Solutions"]; Harry Foster, chief verification scientist at [g... » read more

Formal’s Roadmap


Formal verification has come a long way in the past five years as it focused on narrow tasks within the verification flow. Semiconductor Engineering sat down to discuss that progress, and the future of formal technologies, with [getperson id="11306" comment="Raik Brinkmann"], president and CEO of [getentity id="22395" e_name="OneSpin Solutions"]; Harry Foster, chief verification scientist at [g... » read more

Gaps In The Verification Flow


Semiconductor Engineering sat down to discuss the state of the functional verification flow with Stephen Bailey, director of emerging companies at [getentity id="22017" e_name="Mentor Graphics"]; [getperson id="11079" comment="Anupam Bakshi"], CEO of [getentity id="22168" e_name="Agnisys"]; [getperson id="11124" comment="Mike Bartley"], CEO of [getentity id="22868" e_name="Test and Verification... » read more

Emulation’s Footprint Grows


It wasn't that many years ago that [getkc id="30" comment="emulation"] was an expensive tool available to only a few, but it has since become indispensable for a growing number of companies. One obvious reason is the growing size of designs and the inability of [getkc id="11" kc_name="simulation"] to keep up. But emulation also has been going through a number of transformations that have made i... » read more

Gaps In The Verification Flow


Semiconductor Engineering sat down to discuss the state of the functional verification flow with Stephen Bailey, director of emerging companies at [getentity id="22017" e_name="Mentor Graphics"]; [getperson id="11079" comment="Anupam Bakshi"], CEO of [getentity id="22168" e_name="Agnisys"]; [getperson id="11124" comment="Mike Bartley"], CEO of [getentity id="22868" e_name="Test and Verification... » read more

Choosing Verification Engines


Emulation, simulation, FPGA prototyping and formal verification have very specific uses on paper, but the lines are becoming less clear as complexity goes up, more third-party IP is included, and the number of use cases and interactions of connected devices explodes. Ironically, the lines are blurring not for the most complex SoCs, such as those used in smart phones. The bigger challenge app... » read more

What’s Next For UVM?


The infrastructure for much of the chip verification being done today is looking dated and limited in scope. Design has migrated to new methodologies, standards and tools that are being introduced to deal with heterogeneous integration, more customization, and increased complexity. Verification methodologies started appearing soon after the release of SystemVerilog. Initially they were inten... » read more

Formal Analysis Of X Propagation


Verifying the absence of undefined signal values in a design is in general a hard problem. Formal 4-state logic analysis offers a powerful solution. This white paper discusses X-related verification issues, and how advanced 4-state formal analysis solves them. This white paper covers the 360 DV-Verify product. To read more, click here. » read more

Executive Insight: Raik Brinkmann


[getperson id="11306" comment="Raik Brinkmann"], president and CEO of [getentity id="22395" e_name="OneSpin Solutions"], sat down with Semiconductor Engineering to discuss where and why formal verification is gaining traction, and how it fits alongside other verification approaches. What follows are excerpts of that conversation. SE: [getkc id="33" kc_name="Formal"] has been around for a whi... » read more

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