Getting Smarter About Tool Maintenance

By Anne Meixner - 16 Mar, 2023 - Comments: 0

Chipmakers have begun to shift to predictive maintenance for process tools, but the hefty investment in analytics and engineering efforts means it will take some time for smart maintenance to become a widespread practice. Semiconductor manufacturers need to maintain a diverse set of equipment to process the flow of wafers, dies, packaged parts, and boards running through factories. OSAT and ... » read more

Adopting Predictive Maintenance On Fab Tools

By Anne Meixner - 06 Dec, 2022 - Comments: 0

Predictive maintenance, based on more and better sensor data from semiconductor manufacturing equipment, can reduce downtime in the fab and ultimately cut costs compared with regularly scheduled maintenance. But implementing this approach is non-trivial, and it can be disruptive to well-honed processes and flows. Not performing maintenance quickly enough can result in damage to wafers or the... » read more

Finding And Applying Domain Expertise In IC Analytics

By Anne Meixner - 12 Apr, 2022 - Comments: 0

Behind PowerPoint slides depicting the data inputs and outputs of a data analytics platform belies the complexity, effort, and expertise that improve fab yield. With the tsunami of data collected for semiconductor devices, fabs need engineers with domain expertise to effectively manage the data and to correctly learn from the data. Naively analyzing a data set can lead to an uninteresting an... » read more

Coping With Parallel Test Site-to-Site Variation

By Anne Meixner - 09 Nov, 2021 - Comments: 1

Testing multiple devices in parallel using the same ATE results in reduced test time and lower costs, but it requires engineering finesse to make it so. Minimizing test measurement variation for each device under test (DUT) is a multi-physics problem, and it's one that is becoming more essential to resolve at each new process node and in multi-chip packages. It requires synchronization of el... » read more

Geo-Spatial Outlier Detection

By Anne Meixner - 19 Jul, 2021 - Comments: 0

Comparing die test results with other die on a wafer helps identify outliers, but combining that data with the exact location of an outlier offers a much deeper understanding of what can go wrong and why. The main idea in outlier detection is to find something in or on a die that is different from all the other dies on a wafer. Doing this in the context of a die’s neighbor has become easie... » read more

Data Issues Mount In Chip Manufacturing

By Anne Meixner - 09 Feb, 2021 - Comments: 2

For yield management systems the old calculation adage, "garbage in/garbage out" still rings true. Aligning and cleaning data remains a dirty business. With the increased value in data in the semiconductor supply chain, there now are essentially two supply chains running in parallel. One involves the physical product being created, while the other includes the data associated with each proce... » read more

Too Much Fab And Test Data, Low Utilization

By Anne Meixner - 12 Jan, 2021 - Comments: 7

Can there be such a thing as too much data in the semiconductor and electronics manufacturing process? The answer is, it depends. An estimated 80% or more of the data collected across the semiconductor supply chain is never looked at, from design to manufacturing and out into the field. While this may be surprising, there are some good reasons: Engineers only look at data necessary to s... » read more

Week In Review: Manufacturing, Test

By Mark LaPedus - 02 Jul, 2020 - Comments: 0

Fab tools, packaging/test VLSI Research has released its 200mm wafer fab equipment (WFE) market share figures for 2019. The top three suppliers--Applied Materials, TEL, and ASML—saw growth in the 2019 200mm WFE business. Lam Research was in fourth place, followed by KLA and Canon. In total, 200mm wafer fab equipment sales were $3.6 billion in 2019, declining 5% from 2018, according to the fi... » read more

Week In Review: Design, Low Power

By Jesse Allen - 02 Jul, 2020 - Comments: 1

Galaxy Semiconductor re-established with the planned acquisition of the Quantix Business assets from Mentor, a Siemens business. The software products Galaxy is acquiring focus on yield optimization, device characterization, and reliability improvement. Galaxy was initially founded in 1998; the Galway, Ireland-based company was then acquired by Mentor Graphics in 2016. The re-established compan... » read more

The Week In Review: Design

By Jesse Allen - 14 Oct, 2016 - Comments: 0

M&A Mentor Graphics acquired Galaxy Semiconductor, a provider of test data analysis and defect reduction software ranging from initial characterization of sample devices to automated yield management of large-scale production. The Galway, Ireland company was founded in 1998. Terms of the deal were not disclosed. IP Imagination rolled out a new heterogeneous MIPS CPU with many core/... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?