Advanced Packaging Driving New Collaboration Across Supply Chain


The semiconductor industry is undergoing a profound shift in packaging technologies to ones that rely on close collaboration among multiple stakeholders to solve intricate, multi-faceted, and extraordinarily complex problems. At the heart of this change is the convergence of heterogeneous integration, chiplets, and 3D stacking. Heterogeneous approaches allow companies to combine different te... » read more

Big Changes In Optical Inspection


Optical inspection always has been the workhorse technology for finding defects in chips. It's fast, cost-efficient, and generally reliable enough for most chips. But as logic scales into the angstrom range, and as systems become collections of chiplets, optical inspection needs to be combined with other types of inspection such as X-ray and acoustic. Kyle Vander Schaaf, application engineer at... » read more

The Long Climb: Bringing Through Glass Vias (TGV) To High-Volume Manufacturing


The semiconductor industry is a land of peaks and valleys. It’s a place where each innovation represents the culmination of a long and often difficult climb to the summit. In the case of glass substrates, the peak of the mountain is in sight. The arrival of glass substrates comes at an opportune time, as the industry eyes new process innovations to meet the incredible demand for high perfo... » read more

Emerging Technologies Driving Heterogeneous Integration


As chips are disaggregated into chiplets, more features are being added into these devices that chipmakers were unable to include in the past due to reticle size limits and the high cost of scaling everything to the latest process node. This has opened the door to new architectures, new materials such as glass substrates, and a variety of new challenges. Dick Otte, president and CEO of Promex I... » read more

3.5D: The Great Compromise


The semiconductor industry is converging on 3.5D as the next best option in advanced packaging, a hybrid approach that includes stacking logic chiplets and bonding them separately to a substrate shared by other components. This assembly model satisfies the need for big increases in performance while sidestepping some of the thorniest issues in heterogeneous integration. It establishes a midd... » read more

Precision Patterning Options Emerge For Advanced Packaging


The chip industry is ratcheting up investments in advanced packaging as it strives to keep pace with demands for increased functionality and higher performance, including novel patterning technologies that can reduce costs and speed time to market. Success in advanced packages is partly dependent on effectively managing the interconnectivity between the chips, which requires increasingly pre... » read more

Intel Vs. Samsung Vs. TSMC


The three leading-edge foundries — Intel, Samsung, and TSMC — have started filling in some key pieces in their roadmaps, adding aggressive delivery dates for future generations of chip technology and setting the stage for significant improvements in performance with faster delivery time for custom designs. Unlike in the past, when a single industry roadmap dictated how to get to the next... » read more

Speeding Up Metrology At Advanced Nodes


Experts at the Table: Semiconductor Engineering sat down to talk metrology at the most advanced nodes and the impact of using different substrates, with Frank Chen, director of applications and product management at Bruker Nano Surfaces & Metrology; John Hoffman, computer vision engineering manager at Nordson Test & Measurement; and Jiangtao Hu, senior technology director at Onto Inn... » read more

The Race To Glass Substrates


The chip industry is racing to develop glass for advanced packaging, setting the stage for one of the biggest shifts in chip materials in decades — and one that will introduce a broad new set of challenges that will take years to fully resolve. Glass has been discussed as a replacement material for silicon and organic substrates for more than a decade, primarily in multi-die packages. But ... » read more

Overlay Optimization In Advanced IC Substrates


Overlay is becoming a significant problem in the manufacturing of semiconductors, especially in the world of advanced packaging substrates — think panels — the larger the area, the greater the potential for distortion due to warpage. Solving this issue requires more accurate models, better communication through feed forward/feed back throughout the flow, and real-time analytics that are bak... » read more

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