tag: Google

Startup Funding: Q1 2025
By Jesse Allen - 02 Apr, 2025 - Comments: 0

The first quarter of 2025 saw six companies raise at least $100 million in investment. Of those, three went to quantum hardware companies, with major investment into neutral atom, superconducting, and hybrid quantum control approaches. AI chips and enabling technology were another big winner in the quarter, with companies developing optical communications tech for chips and data center infra... » read more

Big Changes Ahead For Interposers And Substrates
By Gregory Haley - 24 Mar, 2025 - Comments: 0

Interposers and substrates are undergoing a profound transformation from intermediaries to engineered platforms responsible for power distribution, thermal management, high-density interconnects, and signal integrity in the most advanced computing systems. This shift is being driven by AI, high-performance computing (HPC), and next-generation communications, where the need for heterogeneous ... » read more

Chip Industry Week In Review
By The SE Staff - 21 Mar, 2025 - Comments: 0

Semiconductor industry energy consumption grew 125% between 2015 and 2023, while direct greenhouse gas emissions rose 23% in the same period, according to the Europe think tank Interface, which analyzed corporate social responsibility reports from 28 global chip manufacturers. CSIS' new report "Understanding U.S. Allies’ Current Legal Authority to Implement AI and Semiconductor Export Cont... » read more

Failure To Launch
By Gregory Haley - 11 Mar, 2025 - Comments: 1

Failure analysis (FA) is an essential step for achieving sufficient yield in semiconductor manufacturing, but it’s struggling to keep pace with smaller dimensions, advanced packaging, and new power delivery architectures. All of these developments make defects harder to find and more expensive to fix, which impacts the reliability of chips and systems. Traditional failure analysis techniqu... » read more

Chip Industry Technical Paper Roundup: Feb. 25
By Liz Allan - 25 Feb, 2025 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=408 /] Find all technical papers here. » read more

Cradle-To-Grave Analysis Of The Carbon Footprint of AI Hardware (Google)
By Technical Paper Link - 24 Feb, 2025 - Comments: 0

A new technical paper titled "Life-Cycle Emissions of AI Hardware: A Cradle-To-Grave Approach and Generational Trends" was published by researchers at Google. Abstract "Specialized hardware accelerators aid the rapid advancement of artificial intelligence (AI), and their efficiency impacts AI's environmental sustainability. This study presents the first publication of a comprehensive AI acc... » read more

Chip Industry Week In Review
By The SE Staff - 07 Feb, 2025 - Comments: 0

The chip industry is well on its way to hit $1 trillion in revenue by the end of its decade. Several analyst firms released 2024 annual results and 2025 predictions: Worldwide semiconductor revenue reached $626 billion in 2024, an 18% increase versus 2023, according to preliminary Gartner report. Memory revenue grew about 70%  2024 versus 2023. The firm forecasts that HBM will make up 19%... » read more

Chip Industry Technical Paper Roundup: Jan. 20
By Linda Christensen - 20 Jan, 2025 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=398 /] Find all technical papers here. » read more

AI Accelerators for Homomorphic Encryption Workloads
By Technical Paper Link - 15 Jan, 2025 - Comments: 0

A new technical paper titled "Leveraging ASIC AI Chips for Homomorphic Encryption" was published by researchers at Georgia Tech, MIT, Google and Cornell University. Abstract: "Cloud-based services are making the outsourcing of sensitive client data increasingly common. Although homomorphic encryption (HE) offers strong privacy guarantee, it requires substantially more resources than compu... » read more

How Google And Intel Use Calibre DesignEnhancer To Reduce IR Drop And Improve Reliability
By Siemens EDA - 15 Jan, 2025 - Comments: 0

In the fast-paced world of semiconductor design, achieving both Design Rule Check (DRC) clean layouts and optimal electrical performance is crucial for minimizing design iterations, reducing time-to-market and ensuring product reliability. This paper explores how the Calibre DesignEnhancer (DE) analysis-based, signoff-quality EMIR solution helps design teams meet these challenges by enhancing p... » read more

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