AI Training Chips


Kurt Shuler, vice president of marketing at Arteris IP, talks with Semiconductor Engineering about how to architect an AI training chip, how different processing elements are used to accelerate training algorithms, and how to achieve improved performance. https://youtu.be/4cnBCX-9jlk     See other tech talk videos here. » read more

Tech Talk: eFPGA Acceleration


Achronix's Kent Orthner talks about when and why to use embedded FPGAs, and how they co-exist with—and compare to—other processing elements. [youtube vid=TXeIOmo7O9o] » read more

Emulation for Power


Solving power problems in today’s leading-edge SoCs requires not only the best architectural choices but advanced tools and techniques to determine the right path to take. This equates to a combination of hardware emulation and power analysis/optimization software tools. Design teams today must have real-life scenarios to accurately predict the power impact of their architectural decisions... » read more

Experts At The Table: SoC Prototyping


By Ann Steffora Mutschler System-Level Design sat down to discuss SoC prototyping with Hillel Miller, pre-silicon verification/emulation manager at Freescale Semiconductor; Frank Schirrmeister, group director, product marketing, for the system development suite at Cadence; and Mick Posner, director of product marketing at Synopsys. What follows are excerpts of that conversation. SLD: How... » read more