tag: Hardware Architecture

Leveraging Multi-Agent RL for Microprocessor Design Space (Harvard, Google)
By Technical Paper Link - 13 Dec, 2022 - Comments: 0

A new technical paper titled "Multi-Agent Reinforcement Learning for Microprocessor Design Space Exploration" was published by researchers at Harvard University and Google research groups. Abstract "Microprocessor architects are increasingly resorting to domain-specific customization in the quest for high-performance and energy-efficiency. As the systems grow in complexity, fine-tuning arch... » read more

Convolutional Neural Networks: Co-Design of Hardware Architecture and Compression Algorithm
By Technical Paper Link - 07 Sep, 2022 - Comments: 0

Researchers at Soongsil University (Korea) published "A Survey on Efficient Convolutional Neural Networks and Hardware Acceleration." Abstract: "Over the past decade, deep-learning-based representations have demonstrated remarkable performance in academia and industry. The learning capability of convolutional neural networks (CNNs) originates from a combination of various feature extraction... » read more

Advances In Reconfigurable Intelligent Surfaces Hardware Architectures: Beyond 5G/6G
By Technical Paper Link - 19 Aug, 2022 - Comments: 0

This technical paper titled "Reconfigurable Intelligent Surfaces for Wireless Communications: Overview of Hardware Designs, Channel Models, and Estimation Techniques" is from researchers at IEEE. The paper's abstract states "we overview and taxonomize the latest advances in RIS [reconfigurable intelligent surfaces] hardware architectures as well as the most recent developments in the modelin... » read more

A Safety-Oriented System Hardware Architecture Exploration Framework
By Technical Paper Link - 12 Jul, 2022 - Comments: 0

New technical paper titled "Safety-Oriented System Hardware Architecture Exploration in Compliance with ISO 26262" from researchers at National Taipei University. Abstract: "Safety-critical intelligent automotive systems require stringent dependability while the systems are in operation. Therefore, safety and reliability issues must be addressed in the development of such safety-critical sy... » read more

MIT: Stackable AI Chip With Lego-style Design
By Technical Paper Link - 13 Jun, 2022 - Comments: 0

New technical paper titled "Reconfigurable heterogeneous integration using stackable chips with embedded artificial intelligence" from researchers at MIT, along with Harvard University, Tsinghua University, Zhejiang University, and others. Partial Abstract: "Here we report stackable hetero-integrated chips that use optoelectronic device arrays for chip-to-chip communication and neuromorphic... » read more

Research Platform for Heterogeneous Computing (ETH Zurich)
By Technical Paper Link - 09 May, 2022 - Comments: 0

New academic paper from ETH Zurich, "HEROv2: Full-Stack Open-Source Research Platform for Heterogeneous Computing." Abstract: "Heterogeneous computers integrate general-purpose host processors with domain-specific accelerators to combine versatility with efficiency and high performance. To realize the full potential of heterogeneous computers, however, many hardware and software design ... » read more

AKER: A Design and Verification Framework for Safe and Secure SoC Access Control
By Technical Paper Link - 12 Nov, 2021 - Comments: 0

Abstract: "Modern systems on a chip (SoCs) utilize heterogeneous architectures where multiple IP cores have concurrent access to on-chip shared resources. In security-critical applications, IP cores have different privilege levels for accessing shared resources, which must be regulated by an access control system. AKER is a design and verification framework for SoC access control. AKER builds ... » read more

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