MPAM-Style Cache Partitioning With ATP-Engine And gem5

The Memory Partitioning and Monitoring (MPAM) Arm architecture supplement allows for memory resources (MPAM MSCs) to be partitioned using PARTID identifiers. This allows privileged software, like OSes and hypervisors to partition caches, memory controllers and interconnects on the hardware level. This allows for bandwidth and latency controls to be defined and enforced for memory requestors. ... » read more

Costs of Static HW Partitioning on RISC-V

A new technical paper titled "Static Hardware Partitioning on RISC-V -- Shortcomings, Limitations, and Prospects" was published by researchers at Technical University of Applied Sciences (Regensburg, Germany) and Siemens AG (Corporate Research). Abstract "On embedded processors that are increasingly equipped with multiple CPU cores, static hardware partitioning is an established means of c... » read more