tag: hardware security

Metrics And Methodology for Hardware Security Constructs (NIST)
By Technical Paper Link - 09 Jun, 2025 - Comments: 0

A new technical paper titled "Metrics and Methodology for Hardware Security Constructs" was published by NIST. Abstract "Although hardware is commonly believed to be security-resilient, it is often susceptible to vulnerabilities arising from design and implementation flaws. These flaws have the potential to jeopardize not only the hardware's security, but also its operations and critical us... » read more

V-NAND PUFs (Seoul National University, SK hynix)
By Technical Paper Link - 03 Jun, 2025 - Comments: 0

A new technical paper titled "Concealable physical unclonable functions using vertical NAND flash memory" was published by researchers at Seoul National University and SK hynix. The paper proposes "a concealable PUF using V-NAND flash memory by generating PUF data through weak Gate-Induced-Drain-Leakage (GIDL) erase." Find the technical paper here. June 2025. Park, SH., Koo, RH., Yang,... » read more

Air-Gap Covert Channel Attack On Spread Spectrum Modulated Clocks (IETR, Lab-STICC)
By Technical Paper Link - 20 May, 2025 - Comments: 0

A new technical paper titled "Clock-to-Clock Modulation Covert Channel" was published by researchers at University of Rennes-INSA Rennes-IETR-UMR  and University of South Brittany/Lab-STICC- UMR CNRS. Abstract "Various Electromagnetic (EM) attacks have been developed to modulate and utilize EM emanations for covert communication, including exploiting processors, memory modules, and periphe... » read more

Cache Side-Channel Attacks On LLMs (MITRE, WPI)
By Technical Paper Link - 18 May, 2025 - Comments: 0

A new technical paper titled "Spill The Beans: Exploiting CPU Cache Side-Channels to Leak Tokens from Large Language Models" was published by researchers at MITRE and Worcester Polytechnic Institute. Abstract "Side-channel attacks on shared hardware resources increasingly threaten confidentiality, especially with the rise of Large Language Models (LLMs). In this work, we introduce Spill The... » read more

Cache Occupancy Attacks Targeting The SLC of Apple M-Series SoCs (Northeastern Univ.)
By Technical Paper Link - 11 May, 2025 - Comments: 0

A new technical paper titled "EXAM: Exploiting Exclusive System-Level Cache in Apple M-Series SoCs for Enhanced Cache Occupancy Attacks" was published by researchers at Northeastern University. Abstract "Cache occupancy attacks exploit the shared nature of cache hierarchies to infer a victim's activities by monitoring overall cache usage, unlike access-driven cache attacks that focus on spe... » read more

Benefits Of Memory-Centric Computing (ETH Zurich)
By Technical Paper Link - 06 May, 2025 - Comments: 0

A new technical paper titled "Memory-Centric Computing: Solving Computing's Memory Problem" was published by researchers at ETH Zurich. Abstract "Computing has a huge memory problem. The memory system, consisting of multiple technologies at different levels, is responsible for most of the energy consumption, performance bottlenecks, robustness problems, monetary cost, and hardware real esta... » read more

Hardware Trojan Attack For SNNs (Sorbonne Université, CNRS)
By Technical Paper Link - 03 May, 2025 - Comments: 0

A new technical paper titled "Input-Triggered Hardware Trojan Attack on Spiking Neural Networks" was published by researchers at Sorbonne Universite, CNRS and Queen’s University Belfast. Abstract "Neuromorphic computing based on spiking neural networks (SNNs) is emerging as a promising alternative to traditional artificial neural networks (ANNs), offering unique advantages in terms of low... » read more

On-Chiplet Framework for Verifying Physical Security and Integrity of Adjacent Chiplets
By Technical Paper Link - 29 Apr, 2025 - Comments: 0

A new technical paper titled "ChipletQuake: On-die Digital Impedance Sensing for Chiplet and Interposer Verification" was published by researchers at Worcester Polytechnic Institute. Abstract "The increasing complexity and cost of manufacturing monolithic chips have driven the semiconductor industry toward chiplet-based designs, where smaller and modular chiplets are integrated onto a singl... » read more

Hardware Security: Assessment Method For Attacks Using Real-World Cases (TU Wien, TÜV Austria)
By Technical Paper Link - 23 Apr, 2025 - Comments: 0

A new technical paper titled "The Pains of Hardware Security: An Assessment Model of Real-World Hardware Security Attacks" was published by researchers at TU Wien and TÜV Austria. "We review some of the publicly known HW attacks that have occurred and propose an assessment scheme for the attacks and the defense on hardware," states the paper. Find the technical paper here. April 2025. ... » read more

Pre-Silicon Hardware Trojans: Design, Benchmarking, Detection And Prevention (Sandia Labs)
By Technical Paper Link - 09 Apr, 2025 - Comments: 0

A new technical paper titled "A Survey on the Design, Detection, and Prevention of Pre-Silicon Hardware Trojans" was published by researchers at Sandia National Laboratories. "In this survey, we first highlight efforts in Trojan design and benchmarking, followed by a cataloging of seminal and recent works in Trojan detection and prevention and their accompanied metrics. Given the volume of l... » read more

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