Hardware Trojans: CPU-Oriented Trojan Trigger Circuits (Georgia Tech)

A new technical paper titled "Towards Practical Fabrication Stage Attacks Using Interrupt-Resilient Hardware Trojans" was published by researchers at Georgia Tech. The paper states: "We introduce a new class of hardware trojans called interrupt-resilient trojans (IRTs). Our work is motivated by the observation that hardware trojan attacks on CPUs, even under favorable attack scenarios (e.g.... » read more

A Framework To Detect Capacitance-Based Analog Hardware Trojans And Mitigate The Effects

A technical paper titled “DeMiST: Detection and Mitigation of Stealthy Analog Hardware Trojans” was published by researchers at Tennessee Tech University and Technische Universitat Wien. Abstract: "The global semiconductor supply chain involves design and fabrication at various locations, which leads to multiple security vulnerabilities, e.g., Hardware Trojan (HT) insertion. Although most... » read more

Circuit Layout-Level Hardware Trojan Detection

A new technical paper titled "A Needle in the Haystack: Inspecting Circuit Layout to Identify Hardware Trojans" was published by researchers at The University of Texas at Dallas and Qualcomm. Abstract "Distributed integrated circuit (IC) supply chain has resulted in a myriad of security vulnerabilities including that of hardware Trojan (HT). An HT can perform malicious modifications on an I... » read more

Overview of Machine Learning Algorithms Used In Hardware Security (TU Delft)

A new technical paper titled "A Survey on Machine Learning in Hardware Security" was published by researchers at TU Delft. Abstract "Hardware security is currently a very influential domain, where each year countless works are published concerning attacks against hardware and countermeasures. A significant number of them use machine learning, which is proven to be very effective in ... » read more

Covert Channel Between the CPU and An FPGA By Modulating The Usage of the Power Distribution Network

A new technical paper titled "CPU to FPGA Power Covert Channel in FPGA-SoCs" was published by researchers at TU Munich and Fraunhofer Research Institution AISEC. Abstract: "FPGA-SoCs are a popular platform for accelerating a wide range of applications due to their performance and flexibility. From a security point of view, these systems have been shown to be vulnerable to various attacks... » read more

Detecting Hardware Trojans In a RISC-V Core’s Post-Layout Phase

A new technical paper "Trojan-D2: Post-Layout Design and Detection of Stealthy Hardware Trojans - A RISC-V Case Study" was published by researchers at University of Bremen, DFKI GmbH, and the German Aerospace Center. Abstract: "With the exponential increase in the popularity of the RISC-V ecosystem, the security of this platform must be re-evaluated especially for mission-critical and IoT d... » read more

ML-Based Framework for Automatically Generating Hardware Trojan Benchmarks

A new technical paper titled "Automatic Hardware Trojan Insertion using Machine Learning" was published by researchers at University of Florida and Stanford University. Abstract (partial): "In this paper, we present MIMIC, a novel AI-guided framework for automatic Trojan insertion, which can create a large population of valid Trojans for a given design by mimicking the properties of a small... » read more