tag: heterogeneous architectures

Why It’s So Difficult — And Costly — To Secure Chips
By Ed Sperling - 02 Dec, 2021 - Comments: 0

Rising concerns about the security of chips used in everything from cars to data centers are driving up the cost and complexity of electronic systems in a variety of ways, some obvious and others less so. Until very recently, semiconductor security was viewed more as a theoretical threat than a real one. Governments certainly worried about adversaries taking control of secure systems through... » read more

What’s Next For Emulation
By Brian Bailey - 28 Oct, 2021 - Comments: 0

Emulation is now the cornerstone of verification for advanced chip designs, but how emulation will evolve to meet future demands involving increasingly dense, complex, and heterogeneous architectures isn't entirely clear. EDA companies have been investing heavily in emulation, increasing capacity, boosting performance, and adding new capabilities. Now the big question is how else they can le... » read more

Partitioning For Better Performance And Power
By Ann Mutschler - 28 Oct, 2021 - Comments: 0

Partitioning is becoming more critical and much more complex as design teams balance different ways to optimize performance and power, shifting their focus from a single chip to a package or system involving multiple chips with very specific tasks. Approaches to design partitioning have changed over the years, most recently because processor clock speeds have hit a wall while the amount of d... » read more

Shifting Auto Architectures
By Ed Sperling - 29 Apr, 2021 - Comments: 0

Domain controllers and gateways are being replaced by central processing modules and zonal gateways to handle all of the data traffic in a vehicle. Ron DiGiuseppe, automotive IP segment manager at Synopsys, talks with Semiconductor Engineering about how automotive applications are changing, what that means for engineering teams, and how they will shift as AI is increasingly deployed. » read more

Astera Labs: Purpose-Built Connectivity
By Ed Sperling - 14 Aug, 2020 - Comments: 0

Growing amounts of data are forcing companies to rethink where data is processed and when, how and where it is moved. But solutions may vary greatly from one company to the next, and from one use case or application to the next. This is forcing the adoption of a heterogenous compute architecture that combines traditional processors, such as CPUs, GPUs and FPGAs, with AI processors and smart net... » read more

Partitioning Drives Architectural Considerations
By Ann Mutschler - 19 Jul, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss partitioning with Raymond Nijssen, vice president of system engineering at Achronix; Andy Ladd, CEO at Baum; Dave Kelf, chief marketing officer at Breker; Rod Metcalfe, product management group director in the Digital & Signoff Group at Cadence; Mark Olen, product marketing group manager at Mentor, a Siemens Business; Tom Anderson, technical mar... » read more

Heterogeneous Design Creating Havoc With Firmware Versions
By Ed Sperling - 01 Apr, 2019 - Comments: 0

Adding different kinds of processing elements into chips is creating system-level incompatibilities because of sometimes necessary, but usually uncoordinated, firmware updates from multiple vendors. In the past, firmware typically was synchronized with other firmware and the chip was verified and debugged. But this becomes much more difficult when multiple heterogeneous processing elements a... » read more

Heterogeneous Hubbub
By Ann Mutschler - 08 Mar, 2018 - Comments: 0

It’s no secret that designers today would prefer not to be restricted in their architectural choices. And who can blame them? At the same time, this sentiment has boosted interest and usage of both heterogenous architectures as well as the RISC-V ISA. To support this, companies across the design, test and verification ecosystem are ramping efforts. One such effort is the teaming of UltraSo... » read more

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